23941 lines
914 KiB
XML
23941 lines
914 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="encodingindex-splitmaintable.xsl" version="1.0"?>
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<!DOCTYPE encodingindex PUBLIC "-//ARM//DTD encodingindex //EN" "encodingindex.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<encodingindex instructionset="T32">
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<hierarchy>
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<regdiagram form="16x2">
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<box hibit="31" width="3" name="op0" usename="1">
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<c colspan="3" />
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</box>
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<box hibit="28" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="26" width="27">
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<c colspan="27" />
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</box>
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</regdiagram>
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<node groupname="n">
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<header>16-bit</header>
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<decode>
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<box hibit="31" width="3" name="op0" usename="1">
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<c colspan="3">!= 111</c>
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</box>
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<box hibit="28" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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</decode>
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<regdiagram form="16">
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6" />
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</box>
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<box hibit="25" width="26">
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<c colspan="26" />
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</box>
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</regdiagram>
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<decode_constraints>
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<decode_constraint name="op0<5:3>" op="!=" val="111" />
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</decode_constraints>
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<node groupname="sftdpi">
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<header>Shift (immediate), add, subtract, move, and compare</header>
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<decode>
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6">00xxxx</c>
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</box>
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</decode>
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<regdiagram form="16">
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<box hibit="31" width="2">
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<c colspan="2">00</c>
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</box>
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<box hibit="29" width="1" name="op0" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="28" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="26" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="25" width="26">
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<c colspan="26" />
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</box>
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</regdiagram>
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<node iclass="addsub16_3l">
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<header>Add, subtract (three low registers)</header>
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<decode>
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<box hibit="29" width="1" name="op0" usename="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="28" width="2" name="op1" usename="1">
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<c colspan="2">11</c>
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</box>
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<box hibit="26" width="1" name="op2" usename="1">
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<c colspan="1">0</c>
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</box>
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</decode>
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</node>
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<node iclass="addsub16_2l_imm">
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<header>Add, subtract (two low registers and immediate)</header>
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<decode>
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<box hibit="29" width="1" name="op0" usename="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="28" width="2" name="op1" usename="1">
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<c colspan="2">11</c>
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</box>
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<box hibit="26" width="1" name="op2" usename="1">
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<c colspan="1">1</c>
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</box>
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</decode>
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</node>
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<node iclass="shift16_imm">
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<header>Shift (immediate)</header>
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<decode>
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<box hibit="29" width="1" name="op0" usename="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="28" width="2" name="op1" usename="1">
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<c colspan="2">!= 11</c>
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</box>
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<box hibit="26" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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</decode>
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</node>
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<node iclass="addsub16_1l_imm">
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<header>Add, subtract, compare, move (one low register and immediate)</header>
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<decode>
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<box hibit="29" width="1" name="op0" usename="1">
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<c colspan="1">1</c>
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</box>
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<box hibit="28" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="26" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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</decode>
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</node>
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</node>
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<node iclass="dpint16_2l">
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<header>Data-processing (two low registers)</header>
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<decode>
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6">010000</c>
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</box>
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</decode>
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</node>
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<node groupname="spcd">
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<header>Special data instructions and branch and exchange</header>
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<decode>
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6">010001</c>
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</box>
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</decode>
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<regdiagram form="16">
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<box hibit="31" width="6">
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<c colspan="6">010001</c>
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</box>
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<box hibit="25" width="2" name="op0" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="23" width="24">
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<c colspan="24" />
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</box>
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</regdiagram>
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<node iclass="bx16">
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<header>Branch and exchange</header>
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<decode>
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<box hibit="25" width="2" name="op0" usename="1">
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<c colspan="2">11</c>
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</box>
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</decode>
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</node>
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<node iclass="addsub16_2h">
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<header>Add, subtract, compare, move (two high registers)</header>
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<decode>
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<box hibit="25" width="2" name="op0" usename="1">
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<c colspan="2">!= 11</c>
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</box>
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</decode>
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</node>
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</node>
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<node iclass="ldlit16">
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<header>Load literal</header>
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<decode>
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6">01001x</c>
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</box>
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</decode>
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</node>
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<node iclass="ldst16_reg">
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<header>Load/store (register offset)</header>
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<decode>
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6">0101xx</c>
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</box>
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</decode>
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</node>
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<node iclass="ldst16_imm">
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<header>Load/store word/byte (immediate offset)</header>
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<decode>
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6">011xxx</c>
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</box>
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</decode>
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</node>
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<node iclass="ldsth16_imm">
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<header>Load/store halfword (immediate offset)</header>
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<decode>
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6">1000xx</c>
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</box>
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</decode>
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</node>
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<node iclass="ldst16_sp">
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<header>Load/store (SP-relative)</header>
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<decode>
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6">1001xx</c>
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</box>
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</decode>
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</node>
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<node iclass="addpcsp16">
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<header>Add PC/SP (immediate)</header>
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<decode>
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6">1010xx</c>
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</box>
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</decode>
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</node>
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<node groupname="misc16">
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<header>Miscellaneous 16-bit instructions</header>
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<decode>
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<box hibit="31" width="6" name="op0" usename="1">
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<c colspan="6">1011xx</c>
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</box>
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</decode>
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<regdiagram form="16">
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<box hibit="31" width="4">
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<c colspan="4">1011</c>
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</box>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4" />
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="20" width="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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<box hibit="15" width="16">
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<c colspan="16" />
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</box>
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</regdiagram>
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<node iclass="adjsp16">
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<header>Adjust SP (immediate)</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">0000</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="ext16">
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<header>Extend</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">0010</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="setpan16">
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<header>SETPAN</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">0110</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2">00</c>
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_24" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">0110</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2">00</c>
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1">1</c>
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="cps16">
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<header>Change Processor State</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">0110</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2">01</c>
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_26" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">0110</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2">1x</c>
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_27" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">0111</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_28" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">1000</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="hlt16">
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<header>Halting breakpoint</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">1010</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2">10</c>
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="rev16">
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<header>Reverse bytes</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">1010</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2">!= 10</c>
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="bkpt16">
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<header>Software breakpoint</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">1110</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4" />
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</box>
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</decode>
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</node>
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<node iclass="hints16">
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<header>Hints</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">1111</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4">0000</c>
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</box>
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</decode>
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</node>
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<node iclass="it16">
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<header>If-Then</header>
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<decode>
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<box hibit="27" width="4" name="op0" usename="1">
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<c colspan="4">1111</c>
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</box>
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<box hibit="23" width="2" name="op1" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="21" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="19" width="4" name="op3" usename="1">
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<c colspan="4">!= 0000</c>
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</box>
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</decode>
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</node>
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<node iclass="cbznz16">
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<header>Compare and branch zero/non-zero</header>
|
|
<decode>
|
|
<box hibit="27" width="4" name="op0" usename="1">
|
|
<c colspan="4">x0x1</c>
|
|
</box>
|
|
<box hibit="23" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="21" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op3" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="pushpop16">
|
|
<header>Push and Pop</header>
|
|
<decode>
|
|
<box hibit="27" width="4" name="op0" usename="1">
|
|
<c colspan="4">x10x</c>
|
|
</box>
|
|
<box hibit="23" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="21" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op3" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node iclass="ldstm16">
|
|
<header>Load/store multiple</header>
|
|
<decode>
|
|
<box hibit="31" width="6" name="op0" usename="1">
|
|
<c colspan="6">1100xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="brc">
|
|
<header>Conditional branch, and Supervisor Call</header>
|
|
<decode>
|
|
<box hibit="31" width="6" name="op0" usename="1">
|
|
<c colspan="6">1101xx</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16">
|
|
<box hibit="31" width="4">
|
|
<c colspan="4">1101</c>
|
|
</box>
|
|
<box hibit="27" width="4" name="op0" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="23" width="24">
|
|
<c colspan="24" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="except16">
|
|
<header>Exception generation</header>
|
|
<decode>
|
|
<box hibit="27" width="4" name="op0" usename="1">
|
|
<c colspan="4">111x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="bcond16">
|
|
<header>Conditional branch</header>
|
|
<decode>
|
|
<box hibit="27" width="4" name="op0" usename="1">
|
|
<c colspan="4">!= 111x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
</node>
|
|
<node iclass="b16">
|
|
<header>Unconditional branch</header>
|
|
<decode>
|
|
<box hibit="31" width="3" name="op0" usename="1">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
<box hibit="28" width="2" name="op1" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="w">
|
|
<header>32-bit</header>
|
|
<decode>
|
|
<box hibit="31" width="3" name="op0" usename="1">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
<box hibit="28" width="2" name="op1" usename="1">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="3">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="19" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="14" width="15">
|
|
<c colspan="15" />
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="op0<3:2>" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<node groupname="cpaf">
|
|
<header>System register access, Advanced SIMD, and floating-point</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">x11x</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="3">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="27" width="2">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="23" width="12">
|
|
<c colspan="12" />
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="9" width="5">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="unalloc_cops1" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="25" width="2" name="op1" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="unalloc_cops2" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="25" width="2" name="op1" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="simddp">
|
|
<header>Advanced SIMD data-processing</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="25" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="3">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
<box hibit="28" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="27" width="4">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="22" width="18">
|
|
<c colspan="18" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="simd_3same">
|
|
<header>Advanced SIMD three registers of the same length</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="t_simd_mulreg">
|
|
<header>Advanced SIMD two registers, or three registers of different lengths</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="3">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="27" width="5">
|
|
<c colspan="5">11111</c>
|
|
</box>
|
|
<box hibit="22" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="19" width="8">
|
|
<c colspan="8" />
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="9" width="3">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="5" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="simd_ext">
|
|
<header>Advanced SIMD vector extract</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd_2r_misc">
|
|
<header>Advanced SIMD two registers misc</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd_tbl">
|
|
<header>Advanced SIMD table permute</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd_dup_sc">
|
|
<header>Advanced SIMD duplicate (scalar)</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd_3diff">
|
|
<header>Advanced SIMD three registers of different lengths</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd_2r_sc">
|
|
<header>Advanced SIMD two registers and a scalar</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="t_simd_12reg">
|
|
<header>Advanced SIMD shifts and immediate generation</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="3">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
<box hibit="28" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="27" width="5">
|
|
<c colspan="5">11111</c>
|
|
</box>
|
|
<box hibit="22" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="15" name="op0" usename="1">
|
|
<c colspan="15" />
|
|
</box>
|
|
<box hibit="6" width="2">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="simd_1r_imm">
|
|
<header>Advanced SIMD one register and modified immediate</header>
|
|
<decode>
|
|
<box hibit="21" width="15" name="op0" usename="1">
|
|
<c colspan="15">000xxxxxxxxxxx0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd_2r_shift">
|
|
<header>Advanced SIMD two registers and shift amount</header>
|
|
<decode>
|
|
<box hibit="21" width="15" name="op0" usename="1">
|
|
<c colspan="15">!= 000xxxxxxxxxxx0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
</node>
|
|
<node groupname="sysldst_mov64">
|
|
<header>Advanced SIMD and System register load/store and 64-bit move</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op1" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="7">
|
|
<c colspan="7">1110110</c>
|
|
</box>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="20" width="9">
|
|
<c colspan="9" />
|
|
</box>
|
|
<box hibit="11" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="8" width="9">
|
|
<c colspan="9" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="simdfp_mov64">
|
|
<header>Advanced SIMD and floating-point 64-bit move</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">00x0</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="cp_mov64">
|
|
<header>System register 64-bit move</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">00x0</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simdfp_ldst">
|
|
<header>Advanced SIMD and floating-point load/store</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">!= 00x0</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="cp_ldst">
|
|
<header>System register Load/Store</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">!= 00x0</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_120" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="sys_mov32">
|
|
<header>Advanced SIMD and System register 32-bit move</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op1" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op3" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="8">
|
|
<c colspan="8">11101110</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="20" width="9">
|
|
<c colspan="9" />
|
|
</box>
|
|
<box hibit="11" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="7" width="3">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="UNALLOCATED_127" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fp_mov16">
|
|
<header>Floating-point 16-bit move</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">001</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fp_mov32">
|
|
<header>Floating-point 32-bit move</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_130" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">001</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_131" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">01x</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_132" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">10x</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_133" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">110</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fp_msr">
|
|
<header>Floating-point move special register</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd_dup_el">
|
|
<header>Advanced SIMD 8/16/32-bit element move/duplicate</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">011</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_136" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">10x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="cp_mov32">
|
|
<header>System register 32-bit move</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">11x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="fpdp">
|
|
<header>Floating-point data-processing</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op1" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op3" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="8">
|
|
<c colspan="8">11101110</c>
|
|
</box>
|
|
<box hibit="23" width="4" name="op0" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="19" width="8">
|
|
<c colspan="8" />
|
|
</box>
|
|
<box hibit="11" width="2">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="9" width="3">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="5" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="fp_2r">
|
|
<header>Floating-point data-processing (two registers)</header>
|
|
<decode>
|
|
<box hibit="23" width="4" name="op0" usename="1">
|
|
<c colspan="4">1x11</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fp_movi">
|
|
<header>Floating-point move immediate</header>
|
|
<decode>
|
|
<box hibit="23" width="4" name="op0" usename="1">
|
|
<c colspan="4">1x11</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fp_3r">
|
|
<header>Floating-point data-processing (three registers)</header>
|
|
<decode>
|
|
<box hibit="23" width="4" name="op0" usename="1">
|
|
<c colspan="4">!= 1x11</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node iclass="unalloc_cops_3" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op1" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op3" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="advsimdext">
|
|
<header>Additional Advanced SIMD and floating-point instructions</header>
|
|
<decode>
|
|
<box hibit="28" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op1" usename="1">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="6">
|
|
<c colspan="6">111111</c>
|
|
</box>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="22" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="15" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="11" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="7" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="5" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="op0<2:1>" op="!=" val="11" />
|
|
</decode_constraints>
|
|
<node iclass="simd_3sameext">
|
|
<header>Advanced SIMD three registers of the same length extension</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">0xx</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fp_csel">
|
|
<header>Floating-point conditional select</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">100</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fp_minmax">
|
|
<header>Floating-point minNum/maxNum</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">101</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6">00xxxx</c>
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fp_extins">
|
|
<header>Floating-point extraction and insertion</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">101</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6">110000</c>
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fp_toint">
|
|
<header>Floating-point directed convert to integer</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">101</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6">111xxx</c>
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="tfloatdpmac">
|
|
<header>Advanced SIMD and floating-point multiply with accumulate</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">10x</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="tsimd_dotprod">
|
|
<header>Advanced SIMD and floating-point dot product</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">10x</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
</node>
|
|
<node iclass="ldstm">
|
|
<header>Load/store multiple</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">0100</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">xx0xx</c>
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="dstd">
|
|
<header>Load/store dual, load/store exclusive, load-acquire/store-release, and table branch</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">0100</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">xx1xx</c>
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="7">
|
|
<c colspan="7">1110100</c>
|
|
</box>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="15" width="8">
|
|
<c colspan="8" />
|
|
</box>
|
|
<box hibit="7" width="3" name="op3" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="4" width="5">
|
|
<c colspan="5" />
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="op0<1>" op="==" val="1" />
|
|
</decode_constraints>
|
|
<node iclass="ldstex">
|
|
<header>Load/store exclusive</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">0010</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="7" width="3" name="op3" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_45" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">0110</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="7" width="3" name="op3" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="tblbr">
|
|
<header>Table branch</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">0110</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="7" width="3" name="op3" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldstex_bhd">
|
|
<header>Load/store exclusive byte/half/dual</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">0110</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="7" width="3" name="op3" usename="1">
|
|
<c colspan="3">01x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldastl">
|
|
<header>Load-acquire / Store-release</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">0110</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="7" width="3" name="op3" usename="1">
|
|
<c colspan="3">1xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldstd_post">
|
|
<header>Load/store dual (immediate, post-indexed)</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">0x11</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op3" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldstd_imm">
|
|
<header>Load/store dual (immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">1x10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op3" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldstd_pre">
|
|
<header>Load/store dual (immediate, pre-indexed)</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">1x11</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op3" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="lddlit">
|
|
<header>Load dual (literal)</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">!= 0xx0</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op3" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node iclass="dpint_shiftr">
|
|
<header>Data-processing (shifted register)</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">0101</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="bcrtrl">
|
|
<header>Branches and miscellaneous control</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">10xx</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="5">
|
|
<c colspan="5">11110</c>
|
|
</box>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="19" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="15" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="11" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="7" width="2">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="5">
|
|
<c colspan="5" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="msr_spec">
|
|
<header>MSR (special)</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="msr_bank">
|
|
<header>MSR (banked)</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="hints">
|
|
<header>Hints</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="cps">
|
|
<header>Change processor state</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3">!= 000</c>
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="system">
|
|
<header>Miscellaneous system</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="bx_jaz">
|
|
<header>Branch and Exchange Jazelle</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="eret">
|
|
<header>Exception return</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">01</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="mrs_spec">
|
|
<header>MRS (special)</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="mrs_bank">
|
|
<header>MRS (banked)</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="dcps">
|
|
<header>DCPS</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_66" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_67" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">01</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_68" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_69" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="except">
|
|
<header>Exception generation</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="bcond">
|
|
<header>Conditional branch</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4">!= 111x</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="b">
|
|
<header>Unconditional branch</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">0x1</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="blx">
|
|
<header>Unconditional branch and link exchange</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">1x0</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="bl">
|
|
<header>Unconditional branch and link</header>
|
|
<decode>
|
|
<box hibit="26" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="25" width="4" name="op1" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="14" width="3" name="op3" usename="1">
|
|
<c colspan="3">1x1</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op4" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="5" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node iclass="dpint_immm">
|
|
<header>Data-processing (modified immediate)</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">10x0</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="imm">
|
|
<header>Data-processing (plain binary immediate)</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">10x1</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">xxxx0</c>
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="5">
|
|
<c colspan="5">11110</c>
|
|
</box>
|
|
<box hibit="26" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="25" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="23" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="22" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="20" width="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="19" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="15" width="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="14" width="15">
|
|
<c colspan="15" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="dpint_imms">
|
|
<header>Data-processing (simple immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="op1" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="movw">
|
|
<header>Move Wide (16-bit immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="op1" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_53" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="sat_bit">
|
|
<header>Saturate, Bitfield</header>
|
|
<decode>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node iclass="unalloc" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">10x1</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">xxxx1</c>
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="vldst">
|
|
<header>Advanced SIMD element or structure load/store</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">1100</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">1xxx0</c>
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="8">
|
|
<c colspan="8">11111001</c>
|
|
</box>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="22" width="2">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="20" width="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="19" width="8">
|
|
<c colspan="8" />
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="9" width="10">
|
|
<c colspan="10" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="asimldstms">
|
|
<header>Advanced SIMD load/store multiple structures</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="asimldall">
|
|
<header>Advanced SIMD load single structure to all lanes</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="asimldstss">
|
|
<header>Advanced SIMD load/store single structure to one lane</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="ldst">
|
|
<header>Load/store single</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">1100</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">!= 1xxx0</c>
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="7">
|
|
<c colspan="7">1111100</c>
|
|
</box>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="22" width="2">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="15" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="5" width="6">
|
|
<c colspan="6" />
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="op0<1>:op1" op="!=" val="10" />
|
|
</decode_constraints>
|
|
<node iclass="ldst_unsigned_reg">
|
|
<header>Load/store, unsigned (register offset)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">000000</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_90" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">000001</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_91" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">00001x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_92" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">0001xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_93" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">001xxx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_94" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">01xxxx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_99" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">10x0xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_unsigned_post">
|
|
<header>Load/store, unsigned (immediate, post-indexed)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">10x1xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_unsigned_nimm">
|
|
<header>Load/store, unsigned (negative immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">1100xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_unsigned_unpriv">
|
|
<header>Load/store, unsigned (unprivileged)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">1110xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_unsigned_pre">
|
|
<header>Load/store, unsigned (immediate, pre-indexed)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">11x1xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_unsigned_pimm">
|
|
<header>Load/store, unsigned (positive immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">01</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldlit_unsigned">
|
|
<header>Load, unsigned (literal)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_signed_reg">
|
|
<header>Load/store, signed (register offset)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">000000</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_77" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">000001</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_78" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">00001x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_79" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">0001xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_80" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">001xxx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_81" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">01xxxx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_86" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">10x0xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_signed_post">
|
|
<header>Load/store, signed (immediate, post-indexed)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">10x1xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_signed_nimm">
|
|
<header>Load/store, signed (negative immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">1100xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_signed_unpriv">
|
|
<header>Load/store, signed (unprivileged)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">1110xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_signed_pre">
|
|
<header>Load/store, signed (immediate, pre-indexed)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6">11x1xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldst_signed_pimm">
|
|
<header>Load/store, signed (positive immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldlit_signed">
|
|
<header>Load, signed (literal)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="op2" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="11" width="6" name="op3" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="reg">
|
|
<header>Data-processing (register)</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">1101</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">0xxxx</c>
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="8">
|
|
<c colspan="8">11111010</c>
|
|
</box>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="22" width="7">
|
|
<c colspan="7" />
|
|
</box>
|
|
<box hibit="15" width="4" name="op1" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="11" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="shiftr">
|
|
<header>Register shifts</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4">0000</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_105" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4">0001</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_106" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4">001x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_107" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4">01xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="extendr">
|
|
<header>Register extends</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4">1xxx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="addsub_par">
|
|
<header>Parallel add-subtract</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4">0xxx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="dpint_2r">
|
|
<header>Data-processing (two source registers)</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4">10xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_111" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="op1" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4">11xx</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_103" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="15" width="4" name="op1" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="mul">
|
|
<header>Multiply, multiply accumulate, and absolute difference</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">1101</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">10xxx</c>
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="16x2">
|
|
<box hibit="31" width="9">
|
|
<c colspan="9">111110110</c>
|
|
</box>
|
|
<box hibit="22" width="15">
|
|
<c colspan="15" />
|
|
</box>
|
|
<box hibit="7" width="2" name="op0" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="5" width="6">
|
|
<c colspan="6" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="mul_abd">
|
|
<header>Multiply and absolute difference</header>
|
|
<decode>
|
|
<box hibit="7" width="2" name="op0" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_113" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="7" width="2" name="op0" usename="1">
|
|
<c colspan="2">01</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_114" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="7" width="2" name="op0" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node iclass="lmul_div">
|
|
<header>Long multiply and divide</header>
|
|
<decode>
|
|
<box hibit="28" width="4" name="op0" usename="1">
|
|
<c colspan="4">1101</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">11xxx</c>
|
|
</box>
|
|
<box hibit="15" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
</hierarchy>
|
|
<groups heading="Top-level Encoding Groups">
|
|
<maintable class="grouptable" size="16x2" howmanybits="32">
|
|
<col bitno="31" colno="1" printwidth="0.019in" />
|
|
<col bitno="30" colno="2" printwidth="0.019in" />
|
|
<col bitno="29" colno="3" printwidth="0.019in" />
|
|
<col bitno="28" colno="4" printwidth="0.019in" />
|
|
<col bitno="27" colno="5" printwidth="0.019in" />
|
|
<col bitno="26" colno="6" printwidth="0.019in" />
|
|
<col bitno="25" colno="7" printwidth="0.019in" />
|
|
<col bitno="24" colno="8" printwidth="0.019in" />
|
|
<col bitno="23" colno="9" printwidth="0.019in" />
|
|
<col bitno="22" colno="10" printwidth="0.019in" />
|
|
<col bitno="21" colno="11" printwidth="0.019in" />
|
|
<col bitno="20" colno="12" printwidth="0.019in" />
|
|
<col bitno="19" colno="13" printwidth="0.019in" />
|
|
<col bitno="18" colno="14" printwidth="0.019in" />
|
|
<col bitno="17" colno="15" printwidth="0.019in" />
|
|
<col bitno="16" colno="16" printwidth="0.019in" />
|
|
<col bitno="15" colno="17" printwidth="0.019in" />
|
|
<col bitno="14" colno="18" printwidth="0.019in" />
|
|
<col bitno="13" colno="19" printwidth="0.019in" />
|
|
<col bitno="12" colno="20" printwidth="0.019in" />
|
|
<col bitno="11" colno="21" printwidth="0.019in" />
|
|
<col bitno="10" colno="22" printwidth="0.019in" />
|
|
<col bitno="9" colno="23" printwidth="0.019in" />
|
|
<col bitno="8" colno="24" printwidth="0.019in" />
|
|
<col bitno="7" colno="25" printwidth="0.019in" />
|
|
<col bitno="6" colno="26" printwidth="0.019in" />
|
|
<col bitno="5" colno="27" printwidth="0.019in" />
|
|
<col bitno="4" colno="28" printwidth="0.019in" />
|
|
<col bitno="3" colno="29" printwidth="0.019in" />
|
|
<col bitno="2" colno="30" printwidth="0.019in" />
|
|
<col bitno="1" colno="31" printwidth="0.019in" />
|
|
<col bitno="0" colno="32" printwidth="0.019in" />
|
|
<col colno="33" printwidth="0.400in" />
|
|
<tableheader>
|
|
<tr class="header1">
|
|
<th colno="1" colspan="32">Instruction bits</th>
|
|
<th colno="33" rowspan="2">Encoding Group</th>
|
|
</tr>
|
|
<tr class="header2-morebits">
|
|
<th class="boxleft">15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th class="boxright">0</th>
|
|
</tr>
|
|
</tableheader>
|
|
<tablebody>
|
|
<tr class="maintable" size="16" groupid="main" groupname="n">
|
|
<td colspan="3" class="boxleft">!= 111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a>16-bit</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="main" iclass="ub">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ub">16-bit Unconditional Branch</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="main" groupname="w">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a>32-bit</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="sftdpi">
|
|
<td class="boxleft">0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="sftdpi">16-bit / Shift (immediate), add, subtract, move, and compare</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="dp">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="dp">16-bit / Data-processing</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="spcd">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="spcd">16-bit / Special data instructions and branch and exchange</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="ldrl">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldrl">16-bit / Load from Literal Pool</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="ldstr">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstr">16-bit / Load/store single (register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="ldstwb">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstwb">16-bit / Load/store single word and unsigned byte (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="ldsthw">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldsthw">16-bit / Load/store single halfword (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="ldstsp">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstsp">16-bit / Load/store single (SP-relative)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="adradds">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="adradds">16-bit / ADR and ADD (SP plus register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="misc16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="misc16">16-bit / Miscellaneous 16-bit instructions</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="ldstmg">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstmg">16-bit / Load/Store multiple registers</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" groupid="n" iclass="brc">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="brc">16-bit / Conditional branch, and Supervisor Call</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="dstm">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dstm">32-bit / Load/store multiple</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="dstd">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dstd">32-bit / Load/store dual, load/store exclusive, load-acquire/store-release, and table branch</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="shfr">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="shfr">32-bit / Data-processing (shifted register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="modi">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="modi">32-bit / Data-processing (modified immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="imm">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="imm">32-bit / Data-processing (plain binary immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" undef="1" groupid="w" iclass="unalloc">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">32-bit / UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="bcrtrl">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="bcrtrl">32-bit / Branches and miscellaneous control</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="ldst">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td colspan="5">!= 1xxx0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst">32-bit / Load/store single</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="vldst">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="vldst">32-bit / Advanced SIMD element or structure load/store</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="reg">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="reg">32-bit / Data-processing (register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="mul">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="mul">32-bit / Multiply, multiply accumulate, and absolute difference</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" iclass="lmul">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="lmul">32-bit / Long multiply, long multiply accumulate, and divide</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="w" groupname="cpaf">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a>32-bit / System register access, Advanced SIMD, and floating-point</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" undef="1" groupid="cpaf" iclass="unalloc_cops1">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">32-bit / System register access, Advanced SIMD, and floating-point / UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" undef="1" groupid="cpaf" iclass="unalloc_cops2">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">32-bit / System register access, Advanced SIMD, and floating-point / UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="cpaf" iclass="sysldst_mov64">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="sysldst_mov64">32-bit / System register access, Advanced SIMD, and floating-point / Advanced SIMD and System register load/store and 64-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="cpaf" iclass="fpdp">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fpdp">32-bit / System register access, Advanced SIMD, and floating-point / Floating-point data-processing</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" undef="1" groupid="cpaf" iclass="unalloc_cops_3">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">32-bit / System register access, Advanced SIMD, and floating-point / UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="cpaf" iclass="sys_mov32">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="sys_mov32">32-bit / System register access, Advanced SIMD, and floating-point / Advanced SIMD and System register 32-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="cpaf" iclass="advsimdext">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td colspan="2">!= 11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="advsimdext">32-bit / System register access, Advanced SIMD, and floating-point / Additional Advanced SIMD and floating-point instructions</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="cpaf" groupname="simddp">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a>32-bit / System register access, Advanced SIMD, and floating-point / Advanced SIMD data-processing</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="simddp" iclass="t_simd_3r_same">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="t_simd_3r_same">32-bit / System register access, Advanced SIMD, and floating-point / Advanced SIMD data-processing / Advanced SIMD three registers of the same length</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="simddp" iclass="t_simd_mulreg">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="t_simd_mulreg">32-bit / System register access, Advanced SIMD, and floating-point / Advanced SIMD data-processing / Advanced SIMD two registers, or three registers of different lengths</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" groupid="simddp" iclass="t_simd_12reg">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="t_simd_12reg">32-bit / System register access, Advanced SIMD, and floating-point / Advanced SIMD data-processing / Advanced SIMD shifts and immediate generation</a>
|
|
</td>
|
|
</tr>
|
|
</tablebody>
|
|
</maintable>
|
|
</groups>
|
|
<maintable class="allclasses" size="16x2" howmanybits="32">
|
|
<col bitno="31" colno="1" printwidth="0.019in" />
|
|
<col bitno="30" colno="2" printwidth="0.019in" />
|
|
<col bitno="29" colno="3" printwidth="0.019in" />
|
|
<col bitno="28" colno="4" printwidth="0.019in" />
|
|
<col bitno="27" colno="5" printwidth="0.019in" />
|
|
<col bitno="26" colno="6" printwidth="0.019in" />
|
|
<col bitno="25" colno="7" printwidth="0.019in" />
|
|
<col bitno="24" colno="8" printwidth="0.019in" />
|
|
<col bitno="23" colno="9" printwidth="0.019in" />
|
|
<col bitno="22" colno="10" printwidth="0.019in" />
|
|
<col bitno="21" colno="11" printwidth="0.019in" />
|
|
<col bitno="20" colno="12" printwidth="0.019in" />
|
|
<col bitno="19" colno="13" printwidth="0.019in" />
|
|
<col bitno="18" colno="14" printwidth="0.019in" />
|
|
<col bitno="17" colno="15" printwidth="0.019in" />
|
|
<col bitno="16" colno="16" printwidth="0.019in" />
|
|
<col bitno="15" colno="17" printwidth="0.019in" />
|
|
<col bitno="14" colno="18" printwidth="0.019in" />
|
|
<col bitno="13" colno="19" printwidth="0.019in" />
|
|
<col bitno="12" colno="20" printwidth="0.019in" />
|
|
<col bitno="11" colno="21" printwidth="0.019in" />
|
|
<col bitno="10" colno="22" printwidth="0.019in" />
|
|
<col bitno="9" colno="23" printwidth="0.019in" />
|
|
<col bitno="8" colno="24" printwidth="0.019in" />
|
|
<col bitno="7" colno="25" printwidth="0.019in" />
|
|
<col bitno="6" colno="26" printwidth="0.019in" />
|
|
<col bitno="5" colno="27" printwidth="0.019in" />
|
|
<col bitno="4" colno="28" printwidth="0.019in" />
|
|
<col bitno="3" colno="29" printwidth="0.019in" />
|
|
<col bitno="2" colno="30" printwidth="0.019in" />
|
|
<col bitno="1" colno="31" printwidth="0.019in" />
|
|
<col bitno="0" colno="32" printwidth="0.019in" />
|
|
<col colno="33" printwidth="0.400in" />
|
|
<tableheader>
|
|
<tr class="header1">
|
|
<th colno="1" colspan="32">Instruction bits</th>
|
|
<th colno="33" rowspan="2">Instruction class</th>
|
|
</tr>
|
|
<tr class="header2-morebits">
|
|
<th class="boxleft">15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th>0</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th class="boxright">0</th>
|
|
</tr>
|
|
</tableheader>
|
|
<tablebody>
|
|
<tr class="maintable" size="16x2" iclass="tsimd_dotprod">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="tsimd_dotprod">Advanced SIMD and floating-point dot product</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="dcps">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dcps">DCPS</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="shiftr">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="shiftr">Register shifts</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_unsigned_unpriv">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_unsigned_unpriv">Load/store, unsigned (unprivileged)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="ldst16_imm">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst16_imm">Load/store word/byte (immediate offset)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="fp_2r">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fp_2r">Floating-point data-processing (two registers)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="lmul_div">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="lmul_div">Long multiply and divide</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="bcond16">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 111x</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="bcond16">Conditional branch</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_ext">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_ext">Advanced SIMD vector extract</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_79">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_unsigned_nimm">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_unsigned_nimm">Load/store, unsigned (negative immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="asimldall">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="asimldall">Advanced SIMD load single structure to all lanes</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_99">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_106">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_123">
|
|
<td class="boxleft"></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="pushpop16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="pushpop16">Push and Pop</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_signed_pimm">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_signed_pimm">Load/store, signed (positive immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="ldlit16">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldlit16">Load literal</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="ext16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ext16">Extend</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="system">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="system">Miscellaneous system</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_136">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="fp_msr">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fp_msr">Floating-point move special register</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="fp_mov32">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fp_mov32">Floating-point 32-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_80">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="tfloatdpmac">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="tfloatdpmac">Advanced SIMD and floating-point multiply with accumulate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="addsub16_2h">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td colspan="2">!= 11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="addsub16_2h">Add, subtract, compare, move (two high registers)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_dup_sc">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_dup_sc">Advanced SIMD duplicate (scalar)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldstex_bhd">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstex_bhd">Load/store exclusive byte/half/dual</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="fp_movi">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fp_movi">Floating-point move immediate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="except16">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="except16">Exception generation</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="fp_minmax">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fp_minmax">Floating-point minNum/maxNum</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="cp_mov32">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="cp_mov32">System register 32-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="ldst16_reg">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst16_reg">Load/store (register offset)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="dpint_2r">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dpint_2r">Data-processing (two source registers)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_113">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_dup_el">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_dup_el">Advanced SIMD 8/16/32-bit element move/duplicate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_tbl">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_tbl">Advanced SIMD table permute</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="fp_3r">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td colspan="4">!= 1x11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fp_3r">Floating-point data-processing (three registers)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_132">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldstex">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstex">Load/store exclusive</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_77">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="b16">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="b16">Unconditional branch</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="eret">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="eret">Exception return</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="addsub16_1l_imm">
|
|
<td class="boxleft">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="addsub16_1l_imm">Add, subtract, compare, move (one low register and immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldlit_unsigned">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldlit_unsigned">Load, unsigned (literal)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="blx">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="blx">Unconditional branch and link exchange</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_133">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="dpint_imms">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dpint_imms">Data-processing (simple immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_93">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_3sameext">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_3sameext">Advanced SIMD three registers of the same length extension</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_114">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="rev16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td colspan="2">!= 10</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="rev16">Reverse bytes</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="addsub16_3l">
|
|
<td class="boxleft">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="addsub16_3l">Add, subtract (three low registers)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_92">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="mul_abd">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="mul_abd">Multiply and absolute difference</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="dpint_immm">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dpint_immm">Data-processing (modified immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_signed_pre">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_signed_pre">Load/store, signed (immediate, pre-indexed)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_unsigned_pre">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_unsigned_pre">Load/store, unsigned (immediate, pre-indexed)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldstm">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstm">Load/store multiple</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" undef="1" iclass="UNALLOCATED_27">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_81">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="adjsp16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="adjsp16">Adjust SP (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_116">
|
|
<td class="boxleft"></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_86">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_130">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="addsub_par">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="addsub_par">Parallel add-subtract</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="dpint16_2l">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="dpint16_2l">Data-processing (two low registers)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_67">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_unsigned_reg">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_unsigned_reg">Load/store, unsigned (register offset)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_90">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="lddlit">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td hover="** != 00">*</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td hover="** != 00">*</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="lddlit">Load dual (literal)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_105">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="addpcsp16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="addpcsp16">Add PC/SP (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="addsub16_2l_imm">
|
|
<td class="boxleft">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="addsub16_2l_imm">Add, subtract (two low registers and immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_1r_imm">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_1r_imm">Advanced SIMD one register and modified immediate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="tblbr">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="tblbr">Table branch</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_127">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_45">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldstd_pre">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstd_pre">Load/store dual (immediate, pre-indexed)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="mrs_spec">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="mrs_spec">MRS (special)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_66">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldstd_imm">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstd_imm">Load/store dual (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldastl">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldastl">Load-acquire / Store-release</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="movw">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movw">Move Wide (16-bit immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="ldst16_sp">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst16_sp">Load/store (SP-relative)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="cps16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="cps16">Change Processor State</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="b">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="b">Unconditional branch</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simdfp_mov64">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simdfp_mov64">Advanced SIMD and floating-point 64-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_53">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_103">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_131">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="bkpt16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="bkpt16">Software breakpoint</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldlit_signed">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldlit_signed">Load, signed (literal)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="cp_mov64">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="cp_mov64">System register 64-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="bx_jaz">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="bx_jaz">Branch and Exchange Jazelle</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="hints">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="hints">Hints</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldstd_post">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstd_post">Load/store dual (immediate, post-indexed)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_2r_misc">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_2r_misc">Advanced SIMD two registers misc</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="msr_bank">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="msr_bank">MSR (banked)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_107">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_unsigned_post">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_unsigned_post">Load/store, unsigned (immediate, post-indexed)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="shift16_imm">
|
|
<td class="boxleft">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td colspan="2">!= 11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="shift16_imm">Shift (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_signed_post">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_signed_post">Load/store, signed (immediate, post-indexed)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_111">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="asimldstss">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="2">!= 11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="asimldstss">Advanced SIMD load/store single structure to one lane</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="msr_spec">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="msr_spec">MSR (special)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" undef="1" iclass="UNALLOCATED_26">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_69">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="cbznz16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="cbznz16">Compare and branch zero/non-zero</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="fp_mov16">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fp_mov16">Floating-point 16-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_3diff">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td colspan="2">!= 11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_3diff">Advanced SIMD three registers of different lengths</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_2r_sc">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td colspan="2">!= 11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_2r_sc">Advanced SIMD two registers and a scalar</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_120">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="ldstm16">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstm16">Load/store multiple</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_signed_reg">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_signed_reg">Load/store, signed (register offset)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simdfp_ldst">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td colspan="4">!= 00x0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simdfp_ldst">Advanced SIMD and floating-point load/store</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="it16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 0000</td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="it16">If-Then</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_3same">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_3same">Advanced SIMD three registers of the same length</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="asimldstms">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="asimldstms">Advanced SIMD load/store multiple structures</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="dpint_shiftr">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dpint_shiftr">Data-processing (shifted register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="ldsth16_imm">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldsth16_imm">Load/store halfword (immediate offset)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="bcond">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td colspan="4">!= 111x</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="bcond">Conditional branch</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_94">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="bx16">
|
|
<td class="boxleft">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="bx16">Branch and exchange</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="cp_ldst">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td colspan="4">!= 00x0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="cp_ldst">System register Load/Store</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_78">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="except">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="except">Exception generation</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="hlt16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="hlt16">Halting breakpoint</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="extendr">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="extendr">Register extends</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="simd_2r_shift">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td colspan="15">!= 000xxxxxxxxxxx0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_2r_shift">Advanced SIMD two registers and shift amount</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_unsigned_pimm">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_unsigned_pimm">Load/store, unsigned (positive immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_68">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_signed_unpriv">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_signed_unpriv">Load/store, signed (unprivileged)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="mrs_bank">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="mrs_bank">MRS (banked)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="fp_toint">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fp_toint">Floating-point directed convert to integer</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="fp_csel">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fp_csel">Floating-point conditional select</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="fp_extins">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fp_extins">Floating-point extraction and insertion</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="cps">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td colspan="3">!= 000</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="cps">Change processor state</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" undef="1" iclass="UNALLOCATED_24">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" undef="1" iclass="UNALLOCATED_28">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="sat_bit">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="sat_bit">Saturate, Bitfield</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="hints16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="hints16">Hints</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" undef="1" iclass="UNALLOCATED_91">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="16" iclass="setpan16">
|
|
<td class="boxleft">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="16" class="t16-padding"></td>
|
|
<td class="iclassname">
|
|
<a classid="setpan16">SETPAN</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="ldst_signed_nimm">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="4">!= 1111</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_signed_nimm">Load/store, signed (negative immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="16x2" iclass="bl">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="bl">Unconditional branch and link</a>
|
|
</td>
|
|
</tr>
|
|
</tablebody>
|
|
</maintable>
|
|
<funcgroupheader id="sftdpi">Shift (immediate), add, subtract, move, and compare</funcgroupheader>
|
|
<iclass_sect id="addsub16_3l" title="Add, subtract (three low registers)">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="6" settings="6">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="25" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="24" width="3" name="Rm" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="21" width="3" name="Rn" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rd" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="addsub16_3l" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="22*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">S</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ADD_r_T1" iformfile="add_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="ADD_r">ADD, ADDS (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_r_T1" iformfile="sub_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SUB_r">SUB, SUBS (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="addsub16_2l_imm" title="Add, subtract (two low registers and immediate)">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="6" settings="6">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="25" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="24" width="3" name="imm3" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="21" width="3" name="Rn" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rd" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="addsub16_2l_imm" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="23*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">S</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ADD_i_T1" iformfile="add_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="ADD_i">ADD, ADDS (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_i_T1" iformfile="sub_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SUB_i">SUB, SUBS (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="addsub16_1l_imm" title="Add, subtract, compare, move (one low register and immediate)">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="28" width="2" name="op" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="26" width="3" name="Rd" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="23" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="addsub16_1l_imm" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="23*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MOV_i_T1" iformfile="mov_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="MOV_i">MOV, MOVS (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMP_i_T1" iformfile="cmp_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="CMP_i">CMP (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_i_T2" iformfile="add_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="ADD_i">ADD, ADDS (immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_i_T2" iformfile="sub_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="SUB_i">SUB, SUBS (immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="shift16_imm" title="Shift (immediate)">
|
|
<regdiagram form="16" psname="" tworows="1">
|
|
<box hibit="31" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="28" width="2" name="op" usename="1" settings="2" constraint="!= 11">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="26" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="21" width="3" name="Rm" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rd" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="op" op="!=" val="11" />
|
|
<decode_constraint name="op" op="!=" val="11" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="shift16_imm" cols="2">
|
|
<col colno="1" printwidth="22*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MOV_r_T2" iformfile="mov_r.xml" first="t" last="t">
|
|
<td class="iformname" iformid="MOV_r">MOV, MOVS (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="dp">Data-processing</funcgroupheader>
|
|
<iclass_sect id="dpint16_2l" title="Data-processing (two low registers)">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="6" settings="6">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="25" width="4" name="op" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="21" width="3" name="Rs" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rd" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="dpint16_2l" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="39*" />
|
|
<col colno="3" printwidth="28*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="AND_r_T1" iformfile="and_r.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="AND_r">AND, ANDS (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EOR_r_T1" iformfile="eor_r.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td class="iformname" iformid="EOR_r">EOR, EORS (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOV_rr_T1_LSL" iformfile="mov_rr.xml" label="logical shift left" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td class="iformname" iformid="MOV_rr">MOV, MOVS (register-shifted register)</td>
|
|
<td class="enctags">T1, Logical shift left</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOV_rr_T1_LSR" iformfile="mov_rr.xml" label="logical shift right" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td class="iformname" iformid="MOV_rr">MOV, MOVS (register-shifted register)</td>
|
|
<td class="enctags">T1, Logical shift right</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOV_rr_T1_ASR" iformfile="mov_rr.xml" label="arithmetic shift right" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td class="iformname" iformid="MOV_rr">MOV, MOVS (register-shifted register)</td>
|
|
<td class="enctags">T1, Arithmetic shift right</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADC_r_T1" iformfile="adc_r.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td class="iformname" iformid="ADC_r">ADC, ADCS (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SBC_r_T1" iformfile="sbc_r.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td class="iformname" iformid="SBC_r">SBC, SBCS (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOV_rr_T1_ROR" iformfile="mov_rr.xml" label="rotate right" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td class="iformname" iformid="MOV_rr">MOV, MOVS (register-shifted register)</td>
|
|
<td class="enctags">T1, Rotate right</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TST_r_T1" iformfile="tst_r.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td class="iformname" iformid="TST_r">TST (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSB_i_T1" iformfile="rsb_i.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td class="iformname" iformid="RSB_i">RSB, RSBS (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMP_r_T1" iformfile="cmp_r.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td class="iformname" iformid="CMP_r">CMP (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMN_r_T1" iformfile="cmn_r.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td class="iformname" iformid="CMN_r">CMN (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORR_r_T1" iformfile="orr_r.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td class="iformname" iformid="ORR_r">ORR, ORRS (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MUL_T1" iformfile="mul.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="MUL">MUL, MULS</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BIC_r_T1" iformfile="bic_r.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td class="iformname" iformid="BIC_r">BIC, BICS (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVN_r_T1" iformfile="mvn_r.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="MVN_r">MVN, MVNS (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="spcd">Special data instructions and branch and exchange</funcgroupheader>
|
|
<iclass_sect id="addsub16_2h" title="Add, subtract, compare, move (two high registers)">
|
|
<regdiagram form="16" psname="" tworows="1">
|
|
<box hibit="31" width="6" settings="6">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op" usename="1" settings="2" constraint="!= 11">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="23" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" width="4" name="Rs" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rd" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="op" op="!=" val="11" />
|
|
<decode_constraint name="op" op="!=" val="11" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="addsub16_2h" cols="5">
|
|
<col colno="1" printwidth="4*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="30*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op</th>
|
|
<th class="bitfields">D:Rd</th>
|
|
<th class="bitfields">Rs</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ADD_r_T2" iformfile="add_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="8" class="bitfield">!= 1101</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td class="iformname" iformid="ADD_r">ADD, ADDS (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t1" iformfile="add_sp_r.xml" label="T1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="ADD_SP_r">ADD, ADDS (SP plus register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t2" iformfile="add_sp_r.xml" label="T2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="8" class="bitfield">1101</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td class="iformname" iformid="ADD_SP_r">ADD, ADDS (SP plus register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMP_r_T2" iformfile="cmp_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="CMP_r">CMP (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOV_r_T1" iformfile="mov_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MOV_r">MOV, MOVS (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="bx16" title="Branch and exchange">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="bx16" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="BX_T1" iformfile="bx.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="BX">BX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BLX_r_T1" iformfile="blx_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="BLX_r">BLX (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="ldrl">Load from Literal Pool</funcgroupheader>
|
|
<iclass_sect id="ldlit16" title="Load literal">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="26" width="3" name="Rt" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="23" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldlit16" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDR_l_T1" iformfile="ldr_l.xml" first="t" last="t">
|
|
<td class="iformname" iformid="LDR_l">LDR (literal)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="ldstr">Load/store single (register)</funcgroupheader>
|
|
<iclass_sect id="ldst16_reg" title="Load/store (register offset)">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="27" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="26" name="B" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="25" name="H" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="24" width="3" name="Rm" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="21" width="3" name="Rn" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rt" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldst16_reg" cols="5">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">B</th>
|
|
<th class="bitfields">H</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STR_r_T1" iformfile="str_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STR_r">STR (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRH_r_T1" iformfile="strh_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="STRH_r">STRH (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRB_r_T1" iformfile="strb_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRB_r">STRB (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSB_r_T1" iformfile="ldrsb_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRSB_r">LDRSB (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_r_T1" iformfile="ldr_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDR_r">LDR (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_r_T1" iformfile="ldrh_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRH_r">LDRH (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_r_T1" iformfile="ldrb_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDRB_r">LDRB (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_r_T1" iformfile="ldrsh_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRSH_r">LDRSH (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="ldstwb">Load/store single word and unsigned byte (immediate)</funcgroupheader>
|
|
<iclass_sect id="ldst16_imm" title="Load/store word/byte (immediate offset)">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="28" name="B" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="27" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="26" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="21" width="3" name="Rn" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rt" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldst16_imm" cols="4">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">B</th>
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STR_i_T1" iformfile="str_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STR_i">STR (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_i_T1" iformfile="ldr_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDR_i">LDR (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRB_i_T1" iformfile="strb_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRB_i">STRB (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_i_T1" iformfile="ldrb_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRB_i">LDRB (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="ldsthw">Load/store single halfword (immediate)</funcgroupheader>
|
|
<iclass_sect id="ldsth16_imm" title="Load/store halfword (immediate offset)">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="27" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="26" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="21" width="3" name="Rn" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rt" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldsth16_imm" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRH_i_T1" iformfile="strh_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRH_i">STRH (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_i_T1" iformfile="ldrh_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRH_i">LDRH (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="ldstsp">Load/store single (SP-relative)</funcgroupheader>
|
|
<iclass_sect id="ldst16_sp" title="Load/store (SP-relative)">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="27" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="26" width="3" name="Rt" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="23" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldst16_sp" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STR_i_T2" iformfile="str_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STR_i">STR (immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_i_T2" iformfile="ldr_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDR_i">LDR (immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="adradds">ADR and ADD (SP plus register)</funcgroupheader>
|
|
<iclass_sect id="addpcsp16" title="Add PC/SP (immediate)">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="27" name="SP" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="26" width="3" name="Rd" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="23" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="addpcsp16" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="31*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">SP</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ADR_T1" iformfile="adr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="ADR">ADR</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_SP_i_T1" iformfile="add_sp_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="ADD_SP_i">ADD, ADDS (SP plus immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="misc16">Miscellaneous 16-bit instructions</funcgroupheader>
|
|
<iclass_sect id="adjsp16" title="Adjust SP (immediate)">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" width="7" name="imm7" usename="1">
|
|
<c colspan="7"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="adjsp16" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="32*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">S</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ADD_SP_i_T2" iformfile="add_sp_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="ADD_SP_i">ADD, ADDS (SP plus immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_SP_i_T1" iformfile="sub_sp_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SUB_SP_i">SUB, SUBS (SP minus immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="cps16" title="Change Processor State">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="10" settings="10">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="21" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" width="5" name="flags" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="cps16" cols="4">
|
|
<col colno="1" printwidth="4*" />
|
|
<col colno="2" printwidth="7*" />
|
|
<col colno="3" printwidth="19*" />
|
|
<col colno="4" printwidth="23*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op</th>
|
|
<th class="bitfields">flags</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SETEND_T1" iformfile="setend.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="5" class="bitfield"></td>
|
|
<td class="iformname" iformid="SETEND">SETEND</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CPSIE_T1_AS" iformfile="cps.xml" label="interrupt enable" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="5" class="bitfield">0xxxx</td>
|
|
<td class="iformname" iformid="CPS">CPS, CPSID, CPSIE</td>
|
|
<td class="enctags">T1, Interrupt enable</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CPSID_T1_AS" iformfile="cps.xml" label="interrupt disable" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="5" class="bitfield">1xxxx</td>
|
|
<td class="iformname" iformid="CPS">CPS, CPSID, CPSIE</td>
|
|
<td class="enctags">T1, Interrupt disable</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="cbznz16" title="Compare and branch zero/non-zero">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="27" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="26" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="25" name="i" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="24" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rn" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="cbznz16" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="CBNZ_T1" iformfile="cbnz.xml" first="t" last="t">
|
|
<td class="iformname" iformid="CBNZ">CBNZ, CBZ</td>
|
|
<td class="enctags">CBNZ</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ext16" title="Extend">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="B" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="3" name="Rm" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rd" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ext16" cols="4">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">B</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SXTH_T1" iformfile="sxth.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SXTH">SXTH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTB_T1" iformfile="sxtb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SXTB">SXTB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTH_T1" iformfile="uxth.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UXTH">UXTH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTB_T1" iformfile="uxtb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="UXTB">UXTB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="hlt16" title="Halting breakpoint">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="10" settings="10">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="imm6" usename="1">
|
|
<c colspan="6"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="hlt16" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="HLT_T1" iformfile="hlt.xml" first="t" last="t">
|
|
<td class="iformname" iformid="HLT">HLT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="hints16" title="Hints">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" width="4" name="hint" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="19" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="hints16" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="31*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">hint</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="NOP_T1" iformfile="nop.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="NOP">NOP</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="YIELD_T1" iformfile="yield.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td class="iformname" iformid="YIELD">YIELD</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="WFE_T1" iformfile="wfe.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td class="iformname" iformid="WFE">WFE</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="WFI_T1" iformfile="wfi.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td class="iformname" iformid="WFI">WFI</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SEV_T1" iformfile="sev.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td class="iformname" iformid="SEV">SEV</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SEVL_T1" iformfile="sevl.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td class="iformname" iformid="SEVL">SEVL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_17_hints16" reserved_nop_hint="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011x</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_18_hints16" reserved_nop_hint="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1xxx</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="it16" title="If-Then">
|
|
<regdiagram form="16" psname="" tworows="1">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" width="4" name="firstcond" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="mask" usename="1" settings="4" constraint="!= 0000">
|
|
<c colspan="4">!= 0000</c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="mask" op="!=" val="0000" />
|
|
<decode_constraint name="mask" op="!=" val="0000" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="it16" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="IT_T1" iformfile="it.xml" first="t" last="t">
|
|
<td class="iformname" iformid="IT">IT</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="pushpop16" title="Push and Pop">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="27" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="26" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" width="8" name="register_list" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="pushpop16" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="PUSH_T1" iformfile="push.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="PUSH">PUSH</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="POP_T1" iformfile="pop.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="POP">POP</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="rev16" title="Reverse bytes">
|
|
<regdiagram form="16" psname="" tworows="1">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="2" name="op" usename="1" settings="2" constraint="!= 10">
|
|
<c colspan="2">!= 10</c>
|
|
</box>
|
|
<box hibit="21" width="3" name="Rm" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rd" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="op" op="!=" val="10" />
|
|
<decode_constraint name="op" op="!=" val="10" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="rev16" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="REV_T1" iformfile="rev.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="REV">REV</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="REV16_T1" iformfile="rev16.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="REV16">REV16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="REVSH_T1" iformfile="revsh.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="REVSH">REVSH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="setpan16" title="SETPAN">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="19" name="imm1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="setpan16" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SETPAN_T1" arch_version="FEAT_PAN" iformfile="setpan.xml" first="t" last="t">
|
|
<td class="iformname" iformid="SETPAN">SETPAN</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="bkpt16" title="Software breakpoint">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="bkpt16" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="BKPT_T1" iformfile="bkpt.xml" first="t" last="t">
|
|
<td class="iformname" iformid="BKPT">BKPT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="ldstmg">Load/Store multiple registers</funcgroupheader>
|
|
<iclass_sect id="ldstm16" title="Load/store multiple">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="27" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="26" width="3" name="Rn" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="23" width="8" name="register_list" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldstm16" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="19*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STM_T1" iformfile="stm.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STM">STM, STMIA, STMEA</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDM_T1" iformfile="ldm.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDM">LDM, LDMIA, LDMFD</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="brc">Conditional branch, and Supervisor Call</funcgroupheader>
|
|
<iclass_sect id="bcond16" title="Conditional branch">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="27" width="4" name="cond" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="23" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond<3:1><3:1>" op="!=" val="111x" />
|
|
<decode_constraint name="cond<3:1><3:1>" op="!=" val="111x" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="bcond16" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="B_T1" iformfile="b.xml" first="t" last="t">
|
|
<td class="iformname" iformid="B">B</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="except16" title="Exception generation">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="except16" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">S</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UDF_T1" iformfile="udf.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UDF">UDF</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SVC_T1" iformfile="svc.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SVC">SVC</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="ub">16-bit Unconditional Branch</funcgroupheader>
|
|
<iclass_sect id="b16" title="Unconditional branch">
|
|
<regdiagram form="16" psname="">
|
|
<box hibit="31" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="26" width="11" name="imm11" usename="1">
|
|
<c colspan="11"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="b16" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="B_T2" iformfile="b.xml" first="t" last="t">
|
|
<td class="iformname" iformid="B">B</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="dstm">Load/store multiple</funcgroupheader>
|
|
<iclass_sect id="ldstm" title="Load/store multiple">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="22" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="14" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="13" width="14" name="register_list" usename="1">
|
|
<c colspan="14"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldstm" cols="4">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="33*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encoding="t1" iformfile="srs.xml" label="T1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SRS">SRS, SRSDA, SRSDB, SRSIA, SRSIB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t1" iformfile="rfe.xml" label="T1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="RFE">RFE, RFEDA, RFEDB, RFEIA, RFEIB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STM_T2" iformfile="stm.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STM">STM, STMIA, STMEA</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDM_T2" iformfile="ldm.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDM">LDM, LDMIA, LDMFD</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STMDB_T1" iformfile="stmdb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STMDB">STMDB, STMFD</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDMDB_T1" iformfile="ldmdb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDMDB">LDMDB, LDMEA</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t2" iformfile="srs.xml" label="T2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SRS">SRS, SRSDA, SRSDB, SRSIA, SRSIB</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t2" iformfile="rfe.xml" label="T2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="RFE">RFE, RFEDA, RFEDB, RFEIA, RFEIB</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="fpdp">Floating-point data-processing</funcgroupheader>
|
|
<iclass_sect id="fp_3r" title="Floating-point data-processing (three registers)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="o0" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="o1" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="o2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="o0:D:o1" op="!=" val="1x11" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fp_3r" cols="5">
|
|
<col colno="1" printwidth="8*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="4*" />
|
|
<col colno="4" printwidth="23*" />
|
|
<col colno="5" printwidth="29*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">o0:o1</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">o2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_fp_3r" undef="1" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLA_f_T2_H" arch_version="FEAT_FP16" iformfile="vmla_f.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMLA_f">VMLA (floating-point)</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_f_T2_H" arch_version="FEAT_FP16" iformfile="vmls_f.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMLS_f">VMLS (floating-point)</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLA_f_T2_S" iformfile="vmla_f.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMLA_f">VMLA (floating-point)</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_f_T2_S" iformfile="vmls_f.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMLS_f">VMLS (floating-point)</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLA_f_T2_D" iformfile="vmla_f.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMLA_f">VMLA (floating-point)</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_f_T2_D" iformfile="vmls_f.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMLS_f">VMLS (floating-point)</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLS_T1_H" arch_version="FEAT_FP16" iformfile="vnmls.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNMLS">VNMLS</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLA_T1_H" arch_version="FEAT_FP16" iformfile="vnmla.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMLA">VNMLA</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLS_T1_S" iformfile="vnmls.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNMLS">VNMLS</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLA_T1_S" iformfile="vnmla.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMLA">VNMLA</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLS_T1_D" iformfile="vnmls.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNMLS">VNMLS</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLA_T1_D" iformfile="vnmla.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMLA">VNMLA</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_f_T2_H" arch_version="FEAT_FP16" iformfile="vmul_f.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMUL_f">VMUL (floating-point)</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMUL_T1_H" arch_version="FEAT_FP16" iformfile="vnmul.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMUL">VNMUL</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_f_T2_S" iformfile="vmul_f.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMUL_f">VMUL (floating-point)</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMUL_T1_S" iformfile="vnmul.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMUL">VNMUL</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_f_T2_D" iformfile="vmul_f.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMUL_f">VMUL (floating-point)</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMUL_T1_D" iformfile="vnmul.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMUL">VNMUL</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADD_f_T2_H" arch_version="FEAT_FP16" iformfile="vadd_f.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VADD_f">VADD (floating-point)</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUB_f_T2_H" arch_version="FEAT_FP16" iformfile="vsub_f.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSUB_f">VSUB (floating-point)</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADD_f_T2_S" iformfile="vadd_f.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VADD_f">VADD (floating-point)</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUB_f_T2_S" iformfile="vsub_f.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSUB_f">VSUB (floating-point)</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADD_f_T2_D" iformfile="vadd_f.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VADD_f">VADD (floating-point)</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUB_f_T2_D" iformfile="vsub_f.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSUB_f">VSUB (floating-point)</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDIV_T1_H" arch_version="FEAT_FP16" iformfile="vdiv.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDIV">VDIV</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDIV_T1_S" iformfile="vdiv.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDIV">VDIV</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDIV_T1_D" iformfile="vdiv.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDIV">VDIV</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMS_T1_H" arch_version="FEAT_FP16" iformfile="vfnms.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFNMS">VFNMS</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMA_T1_H" arch_version="FEAT_FP16" iformfile="vfnma.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFNMA">VFNMA</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMS_T1_S" iformfile="vfnms.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFNMS">VFNMS</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMA_T1_S" iformfile="vfnma.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFNMA">VFNMA</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMS_T1_D" iformfile="vfnms.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFNMS">VFNMS</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMA_T1_D" iformfile="vfnma.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFNMA">VFNMA</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMA_T2_H" arch_version="FEAT_FP16" iformfile="vfma.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFMA">VFMA</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMS_T2_H" arch_version="FEAT_FP16" iformfile="vfms.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMS">VFMS</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMA_T2_S" iformfile="vfma.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFMA">VFMA</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMS_T2_S" iformfile="vfms.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMS">VFMS</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMA_T2_D" iformfile="vfma.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFMA">VFMA</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMS_T2_D" iformfile="vfms.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMS">VFMS</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fp_2r" title="Floating-point data-processing (two registers)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="opc2" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" name="o3" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="fp_2r" cols="6">
|
|
<col colno="1" printwidth="4*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="6*" />
|
|
<col colno="4" printwidth="4*" />
|
|
<col colno="5" printwidth="63*" />
|
|
<col colno="6" printwidth="42*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">o1</th>
|
|
<th class="bitfields">opc2</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">o3</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_fp_2r" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_fp_2r" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABS_T2_H" arch_version="FEAT_FP16" iformfile="vabs.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VABS">VABS</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_r_T2_S" iformfile="vmov_r.xml" label="single-precision scalar" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOV_r">VMOV (register)</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABS_T2_S" iformfile="vabs.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VABS">VABS</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_r_T2_D" iformfile="vmov_r.xml" label="double-precision scalar" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOV_r">VMOV (register)</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABS_T2_D" iformfile="vabs.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VABS">VABS</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNEG_T2_H" arch_version="FEAT_FP16" iformfile="vneg.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNEG">VNEG</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSQRT_T1_H" arch_version="FEAT_FP16" iformfile="vsqrt.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSQRT">VSQRT</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNEG_T2_S" iformfile="vneg.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNEG">VNEG</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSQRT_T1_S" iformfile="vsqrt.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSQRT">VSQRT</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNEG_T2_D" iformfile="vneg.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNEG">VNEG</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSQRT_T1_D" iformfile="vsqrt.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSQRT">VSQRT</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_24_fp_2r" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTB_T1_SH" iformfile="vcvtb.xml" label="half-precision to single-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTB">VCVTB</td>
|
|
<td class="enctags">T1, Half-precision to single-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTT_T1_SH" iformfile="vcvtt.xml" label="half-precision to single-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVTT">VCVTT</td>
|
|
<td class="enctags">T1, Half-precision to single-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTB_T1_DH" iformfile="vcvtb.xml" label="half-precision to double-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTB">VCVTB</td>
|
|
<td class="enctags">T1, Half-precision to double-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTT_T1_DH" iformfile="vcvtt.xml" label="half-precision to double-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVTT">VCVTT</td>
|
|
<td class="enctags">T1, Half-precision to double-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTB_T1_bfs" arch_version="FEAT_AA32BF16" iformfile="vcvtb_bfs.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTB_bfs">VCVTB (BFloat16)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTT_T1_bfs" arch_version="FEAT_AA32BF16" iformfile="vcvtt_bfs.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVTT_bfs">VCVTT (BFloat16)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTB_T1_HS" iformfile="vcvtb.xml" label="single-precision to half-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTB">VCVTB</td>
|
|
<td class="enctags">T1, Single-precision to half-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTT_T1_HS" iformfile="vcvtt.xml" label="single-precision to half-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVTT">VCVTT</td>
|
|
<td class="enctags">T1, Single-precision to half-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTB_T1_HD" iformfile="vcvtb.xml" label="double-precision to half-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTB">VCVTB</td>
|
|
<td class="enctags">T1, Double-precision to half-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTT_T1_HD" iformfile="vcvtt.xml" label="double-precision to half-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVTT">VCVTT</td>
|
|
<td class="enctags">T1, Double-precision to half-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_T1_H" arch_version="FEAT_FP16" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_T1_H" arch_version="FEAT_FP16" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_T1_S" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_T1_S" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_T1_D" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_T1_D" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_T2_H" arch_version="FEAT_FP16" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_T2_H" arch_version="FEAT_FP16" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_T2_S" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_T2_S" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_T2_D" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_T2_D" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTR_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vrintr_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTR_vfp">VRINTR</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTZ_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vrintz_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRINTZ_vfp">VRINTZ (floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTR_vfp_T1_S" iformfile="vrintr_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTR_vfp">VRINTR</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTZ_vfp_T1_S" iformfile="vrintz_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRINTZ_vfp">VRINTZ (floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTR_vfp_T1_D" iformfile="vrintr_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTR_vfp">VRINTR</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTZ_vfp_T1_D" iformfile="vrintz_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRINTZ_vfp">VRINTZ (floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTX_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vrintx_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTX_vfp">VRINTX (floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_56_fp_2r" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTX_vfp_T1_S" iformfile="vrintx_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTX_vfp">VRINTX (floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_ds_T1" iformfile="vcvt_ds.xml" label="single-precision to double-precision" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_ds">VCVT (between double-precision and single-precision)</td>
|
|
<td class="enctags">T1, Single-precision to double-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTX_vfp_T1_D" iformfile="vrintx_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTX_vfp">VRINTX (floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_sd_T1" iformfile="vcvt_ds.xml" label="double-precision to single-precision" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_ds">VCVT (between double-precision and single-precision)</td>
|
|
<td class="enctags">T1, Double-precision to single-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_vi_T1_H" arch_version="FEAT_FP16" iformfile="vcvt_vi.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_vi">VCVT (integer to floating-point, floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_vi_T1_S" iformfile="vcvt_vi.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_vi">VCVT (integer to floating-point, floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_vi_T1_D" iformfile="vcvt_vi.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_vi">VCVT (integer to floating-point, floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_62_fp_2r" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_63_fp_2r" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_64_fp_2r" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VJCVT_T1" arch_version="FEAT_JSCVT" iformfile="vjcvt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VJCVT">VJCVT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_toxv_T1_H" arch_version="FEAT_FP16" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">01x</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_toxv_T1_S" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">01x</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_toxv_T1_D" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">01x</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_uiv_T1_H" arch_version="FEAT_FP16" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_uiv_T1_H" arch_version="FEAT_FP16" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_uiv_T1_S" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_uiv_T1_S" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_uiv_T1_D" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_uiv_T1_D" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_siv_T1_H" arch_version="FEAT_FP16" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_siv_T1_H" arch_version="FEAT_FP16" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_siv_T1_S" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_siv_T1_S" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_siv_T1_D" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_siv_T1_D" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_xv_T1_H" arch_version="FEAT_FP16" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">11x</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_xv_T1_S" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">11x</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_xv_T1_D" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">11x</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fp_movi" title="Floating-point move immediate">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="imm4H" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="imm4L" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="fp_movi" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="29*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_fp_movi" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_i_T2_H" arch_version="FEAT_FP16" iformfile="vmov_i.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_i_T2_S" iformfile="vmov_i.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_i_T2_D" iformfile="vmov_i.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="dstd">Load/store dual, load/store exclusive, load-acquire/store-release, and table branch</funcgroupheader>
|
|
<iclass_sect id="lddlit" title="Load dual (literal)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rt2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="P:W" op="!=" val="0xx0" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="lddlit" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDRD_l_T1" iformfile="ldrd_l.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRD_l">LDRD (literal)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldastl" title="Load-acquire / Store-release">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rt2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="6" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" width="2" name="sz" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldastl" cols="5">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="4*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">op</th>
|
|
<th class="bitfields">sz</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STLB_T1" iformfile="stlb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="STLB">STLB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLH_T1" iformfile="stlh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="STLH">STLH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STL_T1" iformfile="stl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="STL">STL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_ldastl" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLEXB_T1" iformfile="stlexb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="STLEXB">STLEXB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLEXH_T1" iformfile="stlexh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="STLEXH">STLEXH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLEX_T1" iformfile="stlex.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="STLEX">STLEX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLEXD_T1" iformfile="stlexd.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="STLEXD">STLEXD</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAB_T1" iformfile="ldab.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="LDAB">LDAB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAH_T1" iformfile="ldah.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDAH">LDAH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDA_T1" iformfile="lda.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDA">LDA</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_ldastl" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAEXB_T1" iformfile="ldaexb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="LDAEXB">LDAEXB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAEXH_T1" iformfile="ldaexh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDAEXH">LDAEXH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAEX_T1" iformfile="ldaex.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDAEX">LDAEX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAEXD_T1" iformfile="ldaexd.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="LDAEXD">LDAEXD</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstd_imm" title="Load/store dual (immediate)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rt2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstd_imm" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="12*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRD_i_T1_off" iformfile="strd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRD_i">STRD (immediate)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRD_i_T1_off" iformfile="ldrd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRD_i">LDRD (immediate)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstd_post" title="Load/store dual (immediate, post-indexed)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rt2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstd_post" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRD_i_T1_post" iformfile="strd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRD_i">STRD (immediate)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRD_i_T1_post" iformfile="ldrd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRD_i">LDRD (immediate)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstd_pre" title="Load/store dual (immediate, pre-indexed)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rt2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstd_pre" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="17*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRD_i_T1_pre" iformfile="strd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRD_i">STRD (immediate)</td>
|
|
<td class="enctags">T1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRD_i_T1_pre" iformfile="ldrd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRD_i">LDRD (immediate)</td>
|
|
<td class="enctags">T1, Pre-indexed</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstex" title="Load/store exclusive">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldstex" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STREX_T1" iformfile="strex.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STREX">STREX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDREX_T1" iformfile="ldrex.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDREX">LDREX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstex_bhd" title="Load/store exclusive byte/half/dual">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rt2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="5" width="2" name="sz" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldstex_bhd" cols="4">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">sz</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STREXB_T1" iformfile="strexb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="STREXB">STREXB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STREXH_T1" iformfile="strexh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="STREXH">STREXH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_ldstex_bhd" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STREXD_T1" iformfile="strexd.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="STREXD">STREXD</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDREXB_T1" iformfile="ldrexb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="LDREXB">LDREXB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDREXH_T1" iformfile="ldrexh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDREXH">LDREXH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_ldstex_bhd" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDREXD_T1" iformfile="ldrexd.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="LDREXD">LDREXD</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="tblbr" title="Table branch">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="12" settings="12">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="7" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="4" name="H" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="tblbr" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="TBH_T1" iformfile="tbb.xml" first="t" last="t">
|
|
<td class="iformname" iformid="TBB">TBB, TBH</td>
|
|
<td class="enctags">Halfword</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="sys_mov32">Advanced SIMD and System register 32-bit move</funcgroupheader>
|
|
<iclass_sect id="simd_dup_el" title="Advanced SIMD 8/16/32-bit element move/duplicate">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="opc1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" width="2" name="opc2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd_dup_el" cols="5">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="6*" />
|
|
<col colno="4" printwidth="43*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc1</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">opc2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMOV_rs_T1" iformfile="vmov_rs.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">0xx</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td class="iformname" iformid="VMOV_rs">VMOV (general-purpose register to scalar)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_sr_T1" iformfile="vmov_sr.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td class="iformname" iformid="VMOV_sr">VMOV (scalar to general-purpose register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDUP_r_T1" iformfile="vdup_r.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">1xx</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td class="iformname" iformid="VDUP_r">VDUP (general-purpose register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_simd_dup_el" undef="1" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">1xx</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fp_mov16" title="Floating-point 16-bit move">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="fp_mov16" cols="2">
|
|
<col colno="1" printwidth="60*" />
|
|
<col colno="2" printwidth="33*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMOV_h_T1" arch_version="FEAT_FP16" iformfile="vmov_h.xml" first="t" last="t">
|
|
<td class="iformname" iformid="VMOV_h">VMOV (between general-purpose register and half-precision)</td>
|
|
<td class="enctags">T1, To general-purpose register</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fp_mov32" title="Floating-point 32-bit move">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="fp_mov32" cols="2">
|
|
<col colno="1" printwidth="62*" />
|
|
<col colno="2" printwidth="33*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMOV_s_T1" iformfile="vmov_s.xml" first="t" last="t">
|
|
<td class="iformname" iformid="VMOV_s">VMOV (between general-purpose register and single-precision)</td>
|
|
<td class="enctags">T1, To general-purpose register</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fp_msr" title="Floating-point move special register">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="reg" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="fp_msr" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMSR_T1_AS" iformfile="vmsr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMSR">VMSR</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMRS_T1_AS" iformfile="vmrs.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMRS">VMRS</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="cp_mov32" title="System register 32-bit move">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="opc1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="CRn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="8" name="cp15" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" width="3" name="opc2" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="CRm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="cp_mov32" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MCR_T1" iformfile="mcr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="MCR">MCR</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MRC_T1" iformfile="mrc.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="MRC">MRC</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="sysldst_mov64">Advanced SIMD and System register load/store and 64-bit move</funcgroupheader>
|
|
<iclass_sect id="simdfp_mov64" title="Advanced SIMD and floating-point 64-bit move">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rt2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" width="2" name="opc2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="o3" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simdfp_mov64" cols="7">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="6*" />
|
|
<col colno="4" printwidth="6*" />
|
|
<col colno="5" printwidth="4*" />
|
|
<col colno="6" printwidth="87*" />
|
|
<col colno="7" printwidth="36*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="5">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">D</th>
|
|
<th class="bitfields">op</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">opc2</th>
|
|
<th class="bitfields">o3</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_simdfp_mov64" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_simdfp_mov64" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_19_simdfp_mov64" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_simdfp_mov64" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_toss_T1" iformfile="vmov_ss.xml" label="from general-purpose registers" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMOV_ss">VMOV (between two general-purpose registers and two single-precision registers)</td>
|
|
<td class="enctags">T1, From general-purpose registers</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_tod_T1" iformfile="vmov_d.xml" label="from general-purpose registers" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMOV_d">VMOV (between two general-purpose registers and a doubleword floating-point register)</td>
|
|
<td class="enctags">T1, From general-purpose registers</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_18_simdfp_mov64" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_ss_T1" iformfile="vmov_ss.xml" label="to general-purpose registers" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMOV_ss">VMOV (between two general-purpose registers and two single-precision registers)</td>
|
|
<td class="enctags">T1, To general-purpose registers</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_d_T1" iformfile="vmov_d.xml" label="to general-purpose registers" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMOV_d">VMOV (between two general-purpose registers and a doubleword floating-point register)</td>
|
|
<td class="enctags">T1, To general-purpose registers</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simdfp_ldst" title="Advanced SIMD and floating-point load/store">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="P:U:D:W" op="!=" val="00x0" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="simdfp_ldst" cols="9">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="9*" />
|
|
<col colno="6" printwidth="6*" />
|
|
<col colno="7" printwidth="10*" />
|
|
<col colno="8" printwidth="27*" />
|
|
<col colno="9" printwidth="29*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="7">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">P</th>
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">W</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">Rn</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">imm8</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_simdfp_ldst" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_simdfp_ldst" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTM_T2" iformfile="vstm.xml" label="single-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSTM">VSTM, VSTMDB, VSTMIA</td>
|
|
<td class="enctags">T2, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTM_T1" iformfile="vstm.xml" label="double-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx0</td>
|
|
<td class="iformname" iformid="VSTM">VSTM, VSTMDB, VSTMIA</td>
|
|
<td class="enctags">T1, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="FSTMIAX_T1" iformfile="fstmx.xml" label="Increment After" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx1</td>
|
|
<td class="iformname" iformid="FSTMX">FSTMDBX, FSTMIAX</td>
|
|
<td class="enctags">T1, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDM_T2" iformfile="vldm.xml" label="single-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDM">VLDM, VLDMDB, VLDMIA</td>
|
|
<td class="enctags">T2, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDM_T1" iformfile="vldm.xml" label="double-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx0</td>
|
|
<td class="iformname" iformid="VLDM">VLDM, VLDMDB, VLDMIA</td>
|
|
<td class="enctags">T1, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="FLDMIAX_T1" iformfile="fldmx.xml" label="Increment After" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx1</td>
|
|
<td class="iformname" iformid="FLDMX">FLDM*X (FLDMDBX, FLDMIAX)</td>
|
|
<td class="enctags">T1, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTR_T1_H" arch_version="FEAT_FP16" iformfile="vstr.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSTR">VSTR</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTR_T1_S" iformfile="vstr.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSTR">VSTR</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTR_T1_D" iformfile="vstr.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSTR">VSTR</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_T1_H" arch_version="FEAT_FP16" iformfile="vldr_i.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_i">VLDR (immediate)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_T1_S" iformfile="vldr_i.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_i">VLDR (immediate)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_T1_D" iformfile="vldr_i.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_i">VLDR (immediate)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_19_simdfp_ldst" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTMDB_T2" iformfile="vstm.xml" label="single-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSTM">VSTM, VSTMDB, VSTMIA</td>
|
|
<td class="enctags">T2, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTMDB_T1" iformfile="vstm.xml" label="double-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx0</td>
|
|
<td class="iformname" iformid="VSTM">VSTM, VSTMDB, VSTMIA</td>
|
|
<td class="enctags">T1, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="FSTMDBX_T1" iformfile="fstmx.xml" label="Decrement Before" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx1</td>
|
|
<td class="iformname" iformid="FSTMX">FSTMDBX, FSTMIAX</td>
|
|
<td class="enctags">T1, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDMDB_T2" iformfile="vldm.xml" label="single-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDM">VLDM, VLDMDB, VLDMIA</td>
|
|
<td class="enctags">T2, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDMDB_T1" iformfile="vldm.xml" label="double-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx0</td>
|
|
<td class="iformname" iformid="VLDM">VLDM, VLDMDB, VLDMIA</td>
|
|
<td class="enctags">T1, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="FLDMDBX_T1" iformfile="fldmx.xml" label="Decrement Before" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx1</td>
|
|
<td class="iformname" iformid="FLDMX">FLDM*X (FLDMDBX, FLDMIAX)</td>
|
|
<td class="enctags">T1, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_l_T1_H" arch_version="FEAT_FP16" iformfile="vldr_l.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_l">VLDR (literal)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_l_T1_S" iformfile="vldr_l.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_l">VLDR (literal)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_l_T1_D" iformfile="vldr_l.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_l">VLDR (literal)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_35_simdfp_ldst" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="cp_mov64" title="System register 64-bit move">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rt2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="8" name="cp15" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" width="4" name="opc1" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="CRm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="cp_mov64" cols="4">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">D</th>
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_cp_mov64" undef="1" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MCRR_T1" iformfile="mcrr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="MCRR">MCRR</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MRRC_T1" iformfile="mrrc.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="MRRC">MRRC</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="cp_ldst" title="System register Load/Store">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="CRd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="8" name="cp15" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="P:U:D:W" op="!=" val="00x0" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="cp_ldst" cols="8">
|
|
<col colno="1" printwidth="8*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="9*" />
|
|
<col colno="5" printwidth="9*" />
|
|
<col colno="6" printwidth="6*" />
|
|
<col colno="7" printwidth="18*" />
|
|
<col colno="8" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="6">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">P:U:W</th>
|
|
<th class="bitfields">D</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">Rn</th>
|
|
<th class="bitfields">CRd</th>
|
|
<th class="bitfields">cp15</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_cp_ldst" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">!= 0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDC_l_T1" iformfile="ldc_l.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDC_l">LDC (literal)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_cp_ldst" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_cp_ldst" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STC_T1_post" iformfile="stc.xml" label="post-indexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STC">STC</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDC_i_T1_post" iformfile="ldc_i.xml" label="post-indexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDC_i">LDC (immediate)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STC_T1_unind" iformfile="stc.xml" label="unindexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STC">STC</td>
|
|
<td class="enctags">T1, Unindexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDC_i_T1_unind" iformfile="ldc_i.xml" label="unindexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDC_i">LDC (immediate)</td>
|
|
<td class="enctags">T1, Unindexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STC_T1_off" iformfile="stc.xml" label="offset" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1x0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STC">STC</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDC_i_T1_off" iformfile="ldc_i.xml" label="offset" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1x0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDC_i">LDC (immediate)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STC_T1_pre" iformfile="stc.xml" label="pre-indexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STC">STC</td>
|
|
<td class="enctags">T1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDC_i_T1_pre" iformfile="ldc_i.xml" label="pre-indexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDC_i">LDC (immediate)</td>
|
|
<td class="enctags">T1, Pre-indexed</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="shfr">Data-processing (shifted register)</funcgroupheader>
|
|
<iclass_sect id="dpint_shiftr" title="Data-processing (shifted register)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" width="4" name="op1" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="20" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="imm3" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="2" name="imm2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="5" width="2" name="stype" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="dpint_shiftr" cols="7">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="17*" />
|
|
<col colno="5" printwidth="9*" />
|
|
<col colno="6" printwidth="31*" />
|
|
<col colno="7" printwidth="36*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="5">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">S</th>
|
|
<th class="bitfields">Rn</th>
|
|
<th class="bitfields">imm3:imm2:stype</th>
|
|
<th class="bitfields">Rd</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="AND_r_T2" iformfile="and_r.xml" label="AND, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="AND_r">AND, ANDS (register)</td>
|
|
<td class="enctags">T2, AND, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="AND_r_T2_RRX" iformfile="and_r.xml" label="AND, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="AND_r">AND, ANDS (register)</td>
|
|
<td class="enctags">T2, AND, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ANDS_r_T2" iformfile="and_r.xml" label="ANDS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="AND_r">AND, ANDS (register)</td>
|
|
<td class="enctags">T2, ANDS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TST_r_T2" iformfile="tst_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="TST_r">TST (register)</td>
|
|
<td class="enctags">T2, Shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ANDS_r_T2_RRX" iformfile="and_r.xml" label="ANDS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="AND_r">AND, ANDS (register)</td>
|
|
<td class="enctags">T2, ANDS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TST_r_T2_RRX" iformfile="tst_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="TST_r">TST (register)</td>
|
|
<td class="enctags">T2, Rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BICS_r_T2" iformfile="bic_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="BIC_r">BIC, BICS (register)</td>
|
|
<td class="enctags">T2, BICS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BICS_r_T2_RRX" iformfile="bic_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="BIC_r">BIC, BICS (register)</td>
|
|
<td class="enctags">T2, BICS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORR_r_T2" iformfile="orr_r.xml" label="ORR, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORR_r">ORR, ORRS (register)</td>
|
|
<td class="enctags">T2, ORR, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORR_r_T2_RRX" iformfile="orr_r.xml" label="ORR, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORR_r">ORR, ORRS (register)</td>
|
|
<td class="enctags">T2, ORR, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOV_r_T3" iformfile="mov_r.xml" label="MOV, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MOV_r">MOV, MOVS (register)</td>
|
|
<td class="enctags">T3, MOV, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOV_r_T3_RRX" iformfile="mov_r.xml" label="MOV, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MOV_r">MOV, MOVS (register)</td>
|
|
<td class="enctags">T3, MOV, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORRS_r_T2" iformfile="orr_r.xml" label="ORRS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORR_r">ORR, ORRS (register)</td>
|
|
<td class="enctags">T2, ORRS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORRS_r_T2_RRX" iformfile="orr_r.xml" label="ORRS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORR_r">ORR, ORRS (register)</td>
|
|
<td class="enctags">T2, ORRS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOVS_r_T3" iformfile="mov_r.xml" label="MOVS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MOV_r">MOV, MOVS (register)</td>
|
|
<td class="enctags">T3, MOVS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOVS_r_T3_RRX" iformfile="mov_r.xml" label="MOVS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MOV_r">MOV, MOVS (register)</td>
|
|
<td class="enctags">T3, MOVS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORN_r_T1" iformfile="orn_r.xml" label="ORN, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORN_r">ORN, ORNS (register)</td>
|
|
<td class="enctags">ORN, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORN_r_T1_RRX" iformfile="orn_r.xml" label="ORN, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORN_r">ORN, ORNS (register)</td>
|
|
<td class="enctags">ORN, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVN_r_T2" iformfile="mvn_r.xml" label="MVN, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MVN_r">MVN, MVNS (register)</td>
|
|
<td class="enctags">T2, MVN, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVN_r_T2_RRX" iformfile="mvn_r.xml" label="MVN, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MVN_r">MVN, MVNS (register)</td>
|
|
<td class="enctags">T2, MVN, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORNS_r_T1" iformfile="orn_r.xml" label="ORNS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORN_r">ORN, ORNS (register)</td>
|
|
<td class="enctags">ORNS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORNS_r_T1_RRX" iformfile="orn_r.xml" label="ORNS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORN_r">ORN, ORNS (register)</td>
|
|
<td class="enctags">ORNS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVNS_r_T2" iformfile="mvn_r.xml" label="MVNS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MVN_r">MVN, MVNS (register)</td>
|
|
<td class="enctags">T2, MVNS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVNS_r_T2_RRX" iformfile="mvn_r.xml" label="MVNS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MVN_r">MVN, MVNS (register)</td>
|
|
<td class="enctags">T2, MVNS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EOR_r_T2" iformfile="eor_r.xml" label="EOR, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="EOR_r">EOR, EORS (register)</td>
|
|
<td class="enctags">T2, EOR, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EOR_r_T2_RRX" iformfile="eor_r.xml" label="EOR, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="EOR_r">EOR, EORS (register)</td>
|
|
<td class="enctags">T2, EOR, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EORS_r_T2" iformfile="eor_r.xml" label="EORS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="EOR_r">EOR, EORS (register)</td>
|
|
<td class="enctags">T2, EORS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TEQ_r_T1" iformfile="teq_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="TEQ_r">TEQ (register)</td>
|
|
<td class="enctags">T1, Shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EORS_r_T2_RRX" iformfile="eor_r.xml" label="EORS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="EOR_r">EOR, EORS (register)</td>
|
|
<td class="enctags">T2, EORS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TEQ_r_T1_RRX" iformfile="teq_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="TEQ_r">TEQ (register)</td>
|
|
<td class="enctags">T1, Rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_43_dpint_shiftr" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PKHBT_T1" iformfile="pkh.xml" label="PKHBT" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">xxxxx00</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="PKH">PKHBT, PKHTB</td>
|
|
<td class="enctags">T1, PKHBT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_45_dpint_shiftr" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">xxxxx01</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PKHTB_T1" iformfile="pkh.xml" label="PKHTB" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">xxxxx10</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="PKH">PKHBT, PKHTB</td>
|
|
<td class="enctags">T1, PKHTB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_47_dpint_shiftr" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">xxxxx11</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_48_dpint_shiftr" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_r_T3" iformfile="add_r.xml" label="ADD, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ADD_r">ADD, ADDS (register)</td>
|
|
<td class="enctags">T3, ADD, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_r_T3_RRX" iformfile="add_r.xml" label="ADD, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ADD_r">ADD, ADDS (register)</td>
|
|
<td class="enctags">T3, ADD, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_SP_r_T3" iformfile="add_sp_r.xml" label="ADD, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ADD_SP_r">ADD, ADDS (SP plus register)</td>
|
|
<td class="enctags">T3, ADD, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_SP_r_T3_RRX" iformfile="add_sp_r.xml" label="ADD, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ADD_SP_r">ADD, ADDS (SP plus register)</td>
|
|
<td class="enctags">T3, ADD, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMN_r_T2" iformfile="cmn_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="CMN_r">CMN (register)</td>
|
|
<td class="enctags">T2, Shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_r_T3" iformfile="add_r.xml" label="ADDS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="ADD_r">ADD, ADDS (register)</td>
|
|
<td class="enctags">T3, ADDS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_r_T3_RRX" iformfile="add_r.xml" label="ADDS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="ADD_r">ADD, ADDS (register)</td>
|
|
<td class="enctags">T3, ADDS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMN_r_T2_RRX" iformfile="cmn_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="CMN_r">CMN (register)</td>
|
|
<td class="enctags">T2, Rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_SP_r_T3" iformfile="add_sp_r.xml" label="ADDS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="ADD_SP_r">ADD, ADDS (SP plus register)</td>
|
|
<td class="enctags">T3, ADDS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_SP_r_T3_RRX" iformfile="add_sp_r.xml" label="ADDS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="ADD_SP_r">ADD, ADDS (SP plus register)</td>
|
|
<td class="enctags">T3, ADDS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_59_dpint_shiftr" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADCS_r_T2" iformfile="adc_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ADC_r">ADC, ADCS (register)</td>
|
|
<td class="enctags">T2, ADCS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADCS_r_T2_RRX" iformfile="adc_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ADC_r">ADC, ADCS (register)</td>
|
|
<td class="enctags">T2, ADCS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SBCS_r_T2" iformfile="sbc_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SBC_r">SBC, SBCS (register)</td>
|
|
<td class="enctags">T2, SBCS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SBCS_r_T2_RRX" iformfile="sbc_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SBC_r">SBC, SBCS (register)</td>
|
|
<td class="enctags">T2, SBCS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_68_dpint_shiftr" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_r_T2" iformfile="sub_r.xml" label="SUB, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SUB_r">SUB, SUBS (register)</td>
|
|
<td class="enctags">T2, SUB, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_r_T2_RRX" iformfile="sub_r.xml" label="SUB, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SUB_r">SUB, SUBS (register)</td>
|
|
<td class="enctags">T2, SUB, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_SP_r_T1" iformfile="sub_sp_r.xml" label="SUB, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SUB_SP_r">SUB, SUBS (SP minus register)</td>
|
|
<td class="enctags">T1, SUB, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_SP_r_T1_RRX" iformfile="sub_sp_r.xml" label="SUB, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SUB_SP_r">SUB, SUBS (SP minus register)</td>
|
|
<td class="enctags">T1, SUB, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMP_r_T3" iformfile="cmp_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="CMP_r">CMP (register)</td>
|
|
<td class="enctags">T3, Shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_r_T2" iformfile="sub_r.xml" label="SUBS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SUB_r">SUB, SUBS (register)</td>
|
|
<td class="enctags">T2, SUBS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_r_T2_RRX" iformfile="sub_r.xml" label="SUBS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SUB_r">SUB, SUBS (register)</td>
|
|
<td class="enctags">T2, SUBS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMP_r_T3_RRX" iformfile="cmp_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="CMP_r">CMP (register)</td>
|
|
<td class="enctags">T3, Rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_SP_r_T1" iformfile="sub_sp_r.xml" label="SUBS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SUB_SP_r">SUB, SUBS (SP minus register)</td>
|
|
<td class="enctags">T1, SUBS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_SP_r_T1_RRX" iformfile="sub_sp_r.xml" label="SUBS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SUB_SP_r">SUB, SUBS (SP minus register)</td>
|
|
<td class="enctags">T1, SUBS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSBS_r_T1" iformfile="rsb_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">!= 0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="RSB_r">RSB, RSBS (register)</td>
|
|
<td class="enctags">T1, RSBS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSBS_r_T1_RRX" iformfile="rsb_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield">0000011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="RSB_r">RSB, RSBS (register)</td>
|
|
<td class="enctags">T1, RSBS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_83_dpint_shiftr" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="11" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="advsimdext">Additional Advanced SIMD and floating-point instructions</funcgroupheader>
|
|
<iclass_sect id="tsimd_dotprod" title="Advanced SIMD and floating-point dot product">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="op1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="8" name="op4" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="tsimd_dotprod" cols="7">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="5*" />
|
|
<col colno="3" printwidth="5*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="3*" />
|
|
<col colno="6" printwidth="21*" />
|
|
<col colno="7" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="5">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">op2</th>
|
|
<th class="bitfields">op4</th>
|
|
<th class="bitfields">Q</th>
|
|
<th class="bitfields">U</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_tsimd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDOT_s_T1_D" arch_version="FEAT_AA32BF16" iformfile="vdot_s.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDOT_s">VDOT (by element)</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_tsimd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDOT_s_T1_Q" arch_version="FEAT_AA32BF16" iformfile="vdot_s.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDOT_s">VDOT (by element)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_tsimd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_16_tsimd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSDOT_s_T1_D" arch_version="FEAT_DotProd" iformfile="vsdot_s.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSDOT_s">VSDOT (by element)</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUDOT_s_T1_D" arch_version="FEAT_DotProd" iformfile="vudot_s.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VUDOT_s">VUDOT (by element)</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSDOT_s_T1_Q" arch_version="FEAT_DotProd" iformfile="vsdot_s.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSDOT_s">VSDOT (by element)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUDOT_s_T1_Q" arch_version="FEAT_DotProd" iformfile="vudot_s.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VUDOT_s">VUDOT (by element)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_tsimd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_tsimd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUSDOT_s_T1_D" arch_version="FEAT_AA32I8MM" iformfile="vusdot_s.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VUSDOT_s">VUSDOT (by element)</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUDOT_s_T1_D" arch_version="FEAT_AA32I8MM" iformfile="vsudot_s.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSUDOT_s">VSUDOT (by element)</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUSDOT_s_T1_Q" arch_version="FEAT_AA32I8MM" iformfile="vusdot_s.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VUSDOT_s">VUSDOT (by element)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUDOT_s_T1_Q" arch_version="FEAT_AA32I8MM" iformfile="vsudot_s.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSUDOT_s">VSUDOT (by element)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_27_tsimd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_28_tsimd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="tfloatdpmac" title="Advanced SIMD and floating-point multiply with accumulate">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="op1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="tfloatdpmac" cols="6">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="5*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="36*" />
|
|
<col colno="6" printwidth="60*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">op2</th>
|
|
<th class="bitfields">Q</th>
|
|
<th class="bitfields">U</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VCMLA_s_T1_QH" arch_version="FEAT_FCMA" iformfile="vcmla_s.xml" label="128-bit SIMD vector of half-precision floating-point" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMLA_s">VCMLA (by element)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector of half-precision floating-point</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMAL_s_T1_Q" arch_version="FEAT_FHM" iformfile="vfmal_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMAL_s">VFMAL (by scalar)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMSL_s_T1_Q" arch_version="FEAT_FHM" iformfile="vfmsl_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMSL_s">VFMSL (by scalar)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_tfloatdpmac" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMA_bfs_T1_Q" arch_version="FEAT_AA32BF16" iformfile="vfma_bfs.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMA_bfs">VFMAB, VFMAT (BFloat16, by scalar)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMLA_s_T1_DS" arch_version="FEAT_FCMA" iformfile="vcmla_s.xml" label="64-bit SIMD vector of single-precision floating-point" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMLA_s">VCMLA (by element)</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector of single-precision floating-point</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_tfloatdpmac" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMLA_s_T1_QS" arch_version="FEAT_FCMA" iformfile="vcmla_s.xml" label="128-bit SIMD vector of single-precision floating-point" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMLA_s">VCMLA (by element)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector of single-precision floating-point</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd_3sameext" title="Advanced SIMD three registers of the same length extension">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" width="2" name="op1" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="10" name="op3" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="8" name="op4" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd_3sameext" cols="8">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="5*" />
|
|
<col colno="3" printwidth="5*" />
|
|
<col colno="4" printwidth="5*" />
|
|
<col colno="5" printwidth="3*" />
|
|
<col colno="6" printwidth="3*" />
|
|
<col colno="7" printwidth="33*" />
|
|
<col colno="8" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="6">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">op2</th>
|
|
<th class="bitfields">op3</th>
|
|
<th class="bitfields">op4</th>
|
|
<th class="bitfields">Q</th>
|
|
<th class="bitfields">U</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VCADD_T1_D" arch_version="FEAT_FCMA" iformfile="vcadd.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCADD">VCADD</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_40_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCADD_T1_Q" arch_version="FEAT_FCMA" iformfile="vcadd.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCADD">VCADD</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_42_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMMLA_T1_Q" arch_version="FEAT_AA32BF16" iformfile="vmmla.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMMLA">VMMLA</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_16_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDOT_T1_D" arch_version="FEAT_AA32BF16" iformfile="vdot.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDOT">VDOT (vector)</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_18_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDOT_T1_Q" arch_version="FEAT_AA32BF16" iformfile="vdot.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDOT">VDOT (vector)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMAL_T1_Q" arch_version="FEAT_FHM" iformfile="vfmal.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMAL">VFMAL (vector)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_27_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_28_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSMMLA_T1_Q" arch_version="FEAT_AA32I8MM" iformfile="vsmmla.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSMMLA">VSMMLA</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUMMLA_T1_Q" arch_version="FEAT_AA32I8MM" iformfile="vummla.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VUMMLA">VUMMLA</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSDOT_T1_D" arch_version="FEAT_DotProd" iformfile="vsdot.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSDOT">VSDOT (vector)</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUDOT_T1_D" arch_version="FEAT_DotProd" iformfile="vudot.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VUDOT">VUDOT (vector)</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSDOT_T1_Q" arch_version="FEAT_DotProd" iformfile="vsdot.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSDOT">VSDOT (vector)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUDOT_T1_Q" arch_version="FEAT_DotProd" iformfile="vudot.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VUDOT">VUDOT (vector)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMA_bf_T1_Q" arch_version="FEAT_AA32BF16" iformfile="vfma_bf.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMA_bf">VFMAB, VFMAT (BFloat16, vector)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_36_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_37_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_38_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMSL_T1_Q" arch_version="FEAT_FHM" iformfile="vfmsl.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMSL">VFMSL (vector)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_45_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_46_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUSMMLA_T1_Q" arch_version="FEAT_AA32I8MM" iformfile="vusmmla.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VUSMMLA">VUSMMLA</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_48_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUSDOT_T1_D" arch_version="FEAT_AA32I8MM" iformfile="vusdot.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VUSDOT">VUSDOT (vector)</td>
|
|
<td class="enctags">T1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_51_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUSDOT_T1_Q" arch_version="FEAT_AA32I8MM" iformfile="vusdot.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VUSDOT">VUSDOT (vector)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_52_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_53_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_54_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMLA_T1_Q" arch_version="FEAT_FCMA" iformfile="vcmla.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMLA">VCMLA</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_55_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_56_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_57_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_58_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_59_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_60_simd_3sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fp_csel" title="Floating-point conditional select">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="cc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1" settings="2" constraint="!= 00">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fp_csel" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="32*" />
|
|
<col colno="3" printwidth="43*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VSELGT_T1_H" arch_version="FEAT_FP16" iformfile="vsel.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="VSEL">VSELEQ, VSELGE, VSELGT, VSELVS</td>
|
|
<td class="enctags">T1, Greater than, half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSELGT_T1_S" iformfile="vsel.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="VSEL">VSELEQ, VSELGE, VSELGT, VSELVS</td>
|
|
<td class="enctags">T1, Greater than, single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSELGT_T1_D" iformfile="vsel.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="VSEL">VSELEQ, VSELGE, VSELGT, VSELVS</td>
|
|
<td class="enctags">T1, Greater than, double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fp_toint" title="Floating-point directed convert to integer">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="18" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="17" width="2" name="RM" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1" settings="2" constraint="!= 00">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="7" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fp_toint" cols="6">
|
|
<col colno="1" printwidth="4*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="7*" />
|
|
<col colno="4" printwidth="4*" />
|
|
<col colno="5" printwidth="25*" />
|
|
<col colno="6" printwidth="29*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">o1</th>
|
|
<th class="bitfields">RM</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_23_fp_toint" undef="1" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">!= 00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTA_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vrinta_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTA_vfp">VRINTA (floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTA_vfp_T1_S" iformfile="vrinta_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTA_vfp">VRINTA (floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTA_vfp_T1_D" iformfile="vrinta_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTA_vfp">VRINTA (floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTN_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vrintn_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTN_vfp">VRINTN (floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTN_vfp_T1_S" iformfile="vrintn_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTN_vfp">VRINTN (floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTN_vfp_T1_D" iformfile="vrintn_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTN_vfp">VRINTN (floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTP_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vrintp_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTP_vfp">VRINTP (floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTP_vfp_T1_S" iformfile="vrintp_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTP_vfp">VRINTP (floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTP_vfp_T1_D" iformfile="vrintp_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTP_vfp">VRINTP (floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTM_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vrintm_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTM_vfp">VRINTM (floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTM_vfp_T1_S" iformfile="vrintm_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTM_vfp">VRINTM (floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTM_vfp_T1_D" iformfile="vrintm_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTM_vfp">VRINTM (floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTA_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vcvta_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTA_vfp">VCVTA (floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTA_vfp_T1_S" iformfile="vcvta_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTA_vfp">VCVTA (floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTA_vfp_T1_D" iformfile="vcvta_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTA_vfp">VCVTA (floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTN_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vcvtn_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTN_vfp">VCVTN (floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTN_vfp_T1_S" iformfile="vcvtn_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTN_vfp">VCVTN (floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTN_vfp_T1_D" iformfile="vcvtn_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTN_vfp">VCVTN (floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTP_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vcvtp_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTP_vfp">VCVTP (floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTP_vfp_T1_S" iformfile="vcvtp_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTP_vfp">VCVTP (floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTP_vfp_T1_D" iformfile="vcvtp_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTP_vfp">VCVTP (floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTM_vfp_T1_H" arch_version="FEAT_FP16" iformfile="vcvtm_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTM_vfp">VCVTM (floating-point)</td>
|
|
<td class="enctags">T1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTM_vfp_T1_S" iformfile="vcvtm_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTM_vfp">VCVTM (floating-point)</td>
|
|
<td class="enctags">T1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTM_vfp_T1_D" iformfile="vcvtm_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTM_vfp">VCVTM (floating-point)</td>
|
|
<td class="enctags">T1, Double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fp_extins" title="Floating-point extraction and insertion">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="6" settings="6">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1" settings="2" constraint="!= 00">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="7" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fp_extins" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_fp_extins" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOVX_T1" arch_version="FEAT_FP16" iformfile="vmovx.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOVX">VMOVX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VINS_T1" arch_version="FEAT_FP16" iformfile="vins.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VINS">VINS</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_fp_extins" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fp_minmax" title="Floating-point minNum/maxNum">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1" settings="2" constraint="!= 00">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fp_minmax" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="29*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMAXNM_T2_H" arch_version="FEAT_FP16" iformfile="vmaxnm.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMAXNM">VMAXNM</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMINNM_T2_H" arch_version="FEAT_FP16" iformfile="vminnm.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMINNM">VMINNM</td>
|
|
<td class="enctags">T2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMAXNM_T2_S" iformfile="vmaxnm.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMAXNM">VMAXNM</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMINNM_T2_S" iformfile="vminnm.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMINNM">VMINNM</td>
|
|
<td class="enctags">T2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMAXNM_T2_D" iformfile="vmaxnm.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMAXNM">VMAXNM</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMINNM_T2_D" iformfile="vminnm.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMINNM">VMINNM</td>
|
|
<td class="enctags">T2, Double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="modi">Data-processing (modified immediate)</funcgroupheader>
|
|
<iclass_sect id="dpint_immm" title="Data-processing (modified immediate)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="26" name="i" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="25" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" width="4" name="op1" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="20" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="imm3" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="dpint_immm" cols="6">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="9*" />
|
|
<col colno="5" printwidth="32*" />
|
|
<col colno="6" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">S</th>
|
|
<th class="bitfields">Rn</th>
|
|
<th class="bitfields">Rd</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="AND_i_T1" iformfile="and_i.xml" label="AND" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="AND_i">AND, ANDS (immediate)</td>
|
|
<td class="enctags">T1, AND</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ANDS_i_T1" iformfile="and_i.xml" label="ANDS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="AND_i">AND, ANDS (immediate)</td>
|
|
<td class="enctags">T1, ANDS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TST_i_T1" iformfile="tst_i.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="TST_i">TST (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BICS_i_T1" iformfile="bic_i.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="BIC_i">BIC, BICS (immediate)</td>
|
|
<td class="enctags">T1, BICS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORR_i_T1" iformfile="orr_i.xml" label="ORR" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORR_i">ORR, ORRS (immediate)</td>
|
|
<td class="enctags">T1, ORR</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOV_i_T2" iformfile="mov_i.xml" label="MOV" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MOV_i">MOV, MOVS (immediate)</td>
|
|
<td class="enctags">T2, MOV</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORRS_i_T1" iformfile="orr_i.xml" label="ORRS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORR_i">ORR, ORRS (immediate)</td>
|
|
<td class="enctags">T1, ORRS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOVS_i_T2" iformfile="mov_i.xml" label="MOVS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MOV_i">MOV, MOVS (immediate)</td>
|
|
<td class="enctags">T2, MOVS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORN_i_T1" iformfile="orn_i.xml" label="not flag setting" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORN_i">ORN, ORNS (immediate)</td>
|
|
<td class="enctags">Not flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVN_i_T1" iformfile="mvn_i.xml" label="MVN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MVN_i">MVN, MVNS (immediate)</td>
|
|
<td class="enctags">T1, MVN</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORNS_i_T1" iformfile="orn_i.xml" label="flag setting" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ORN_i">ORN, ORNS (immediate)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVNS_i_T1" iformfile="mvn_i.xml" label="MVNS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="MVN_i">MVN, MVNS (immediate)</td>
|
|
<td class="enctags">T1, MVNS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EOR_i_T1" iformfile="eor_i.xml" label="EOR" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="EOR_i">EOR, EORS (immediate)</td>
|
|
<td class="enctags">T1, EOR</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EORS_i_T1" iformfile="eor_i.xml" label="EORS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="EOR_i">EOR, EORS (immediate)</td>
|
|
<td class="enctags">T1, EORS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TEQ_i_T1" iformfile="teq_i.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="TEQ_i">TEQ (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_27_dpint_immm" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_28_dpint_immm" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_i_T3" iformfile="add_i.xml" label="ADD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ADD_i">ADD, ADDS (immediate)</td>
|
|
<td class="enctags">T3, ADD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_SP_i_T3" iformfile="add_sp_i.xml" label="ADD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ADD_SP_i">ADD, ADDS (SP plus immediate)</td>
|
|
<td class="enctags">T3, ADD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_i_T3" iformfile="add_i.xml" label="ADDS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="ADD_i">ADD, ADDS (immediate)</td>
|
|
<td class="enctags">T3, ADDS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_SP_i_T3" iformfile="add_sp_i.xml" label="ADDS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="ADD_SP_i">ADD, ADDS (SP plus immediate)</td>
|
|
<td class="enctags">T3, ADDS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMN_i_T1" iformfile="cmn_i.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="CMN_i">CMN (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_34_dpint_immm" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADCS_i_T1" iformfile="adc_i.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ADC_i">ADC, ADCS (immediate)</td>
|
|
<td class="enctags">T1, ADCS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SBCS_i_T1" iformfile="sbc_i.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SBC_i">SBC, SBCS (immediate)</td>
|
|
<td class="enctags">T1, SBCS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_39_dpint_immm" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_i_T3" iformfile="sub_i.xml" label="SUB" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SUB_i">SUB, SUBS (immediate)</td>
|
|
<td class="enctags">T3, SUB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_SP_i_T2" iformfile="sub_sp_i.xml" label="SUB" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SUB_SP_i">SUB, SUBS (SP minus immediate)</td>
|
|
<td class="enctags">T2, SUB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_i_T3" iformfile="sub_i.xml" label="SUBS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SUB_i">SUB, SUBS (immediate)</td>
|
|
<td class="enctags">T3, SUBS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_SP_i_T2" iformfile="sub_sp_i.xml" label="SUBS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SUB_SP_i">SUB, SUBS (SP minus immediate)</td>
|
|
<td class="enctags">T2, SUBS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMP_i_T2" iformfile="cmp_i.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="CMP_i">CMP (immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSBS_i_T2" iformfile="rsb_i.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="RSB_i">RSB, RSBS (immediate)</td>
|
|
<td class="enctags">T2, RSBS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_47_dpint_immm" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="imm">Data-processing (plain binary immediate)</funcgroupheader>
|
|
<iclass_sect id="dpint_imms" title="Data-processing (simple immediate)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="26" name="i" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="25" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="21" name="o2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="imm3" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="dpint_imms" cols="5">
|
|
<col colno="1" printwidth="4*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="32*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">o1</th>
|
|
<th class="bitfields">o2</th>
|
|
<th class="bitfields">Rn</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ADD_i_T4" iformfile="add_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="ADD_i">ADD, ADDS (immediate)</td>
|
|
<td class="enctags">T4</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_SP_i_T4" iformfile="add_sp_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="ADD_SP_i">ADD, ADDS (SP plus immediate)</td>
|
|
<td class="enctags">T4</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t3" iformfile="adr.xml" label="T3" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="ADR">ADR</td>
|
|
<td class="enctags">T3</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_dpint_imms" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_dpint_imms" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_i_T4" iformfile="sub_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="SUB_i">SUB, SUBS (immediate)</td>
|
|
<td class="enctags">T4</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_SP_i_T3" iformfile="sub_sp_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="SUB_SP_i">SUB, SUBS (SP minus immediate)</td>
|
|
<td class="enctags">T3</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t2" iformfile="adr.xml" label="T2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="ADR">ADR</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="movw" title="Move Wide (16-bit immediate)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="26" name="i" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="25" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="imm3" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="movw" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="23*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">o1</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MOV_i_T3" iformfile="mov_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="MOV_i">MOV, MOVS (immediate)</td>
|
|
<td class="enctags">T3</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOVT_T1" iformfile="movt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="MOVT">MOVT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="sat_bit" title="Saturate, Bitfield">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="26" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="25" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="op1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="14" width="3" name="imm3" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="2" name="imm2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="4" width="5" name="widthm1" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="sat_bit" cols="5">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="11*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<col colno="5" printwidth="28*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">Rn</th>
|
|
<th class="bitfields">imm3:imm2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SSAT_T1_LSL" iformfile="ssat.xml" label="logical shift left" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="9" class="bitfield"></td>
|
|
<td class="iformname" iformid="SSAT">SSAT</td>
|
|
<td class="enctags">T1, Logical shift left</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SSAT_T1_ASR" iformfile="ssat.xml" label="arithmetic shift right" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="9" class="bitfield">!= 00000</td>
|
|
<td class="iformname" iformid="SSAT">SSAT</td>
|
|
<td class="enctags">T1, Arithmetic shift right</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SSAT16_T1" iformfile="ssat16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="9" class="bitfield">00000</td>
|
|
<td class="iformname" iformid="SSAT16">SSAT16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SBFX_T1" iformfile="sbfx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="9" class="bitfield"></td>
|
|
<td class="iformname" iformid="SBFX">SBFX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BFI_T1" iformfile="bfi.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="9" class="bitfield"></td>
|
|
<td class="iformname" iformid="BFI">BFI</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BFC_T1" iformfile="bfc.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="9" class="bitfield"></td>
|
|
<td class="iformname" iformid="BFC">BFC</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USAT_T1_LSL" iformfile="usat.xml" label="logical shift left" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="9" class="bitfield"></td>
|
|
<td class="iformname" iformid="USAT">USAT</td>
|
|
<td class="enctags">T1, Logical shift left</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USAT_T1_ASR" iformfile="usat.xml" label="arithmetic shift right" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="9" class="bitfield">!= 00000</td>
|
|
<td class="iformname" iformid="USAT">USAT</td>
|
|
<td class="enctags">T1, Arithmetic shift right</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USAT16_T1" iformfile="usat16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="9" class="bitfield">00000</td>
|
|
<td class="iformname" iformid="USAT16">USAT16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UBFX_T1" iformfile="ubfx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="9" class="bitfield"></td>
|
|
<td class="iformname" iformid="UBFX">UBFX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_sat_bit" undef="1" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="9" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="bcrtrl">Branches and miscellaneous control</funcgroupheader>
|
|
<iclass_sect id="bx_jaz" title="Branch and Exchange Jazelle">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="12" settings="12">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="bx_jaz" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="BXJ_T1" iformfile="bxj.xml" first="t" last="t">
|
|
<td class="iformname" iformid="BXJ">BXJ</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="cps" title="Change processor state">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="12" settings="12">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="imod" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="8" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" name="A" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="I" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="F" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" width="5" name="mode" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="imod:M" op="!=" val="000" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="cps" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="19*" />
|
|
<col colno="4" printwidth="39*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">imod</th>
|
|
<th class="bitfields">M</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="CPS_T2_AS" iformfile="cps.xml" label="change mode" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="CPS">CPS, CPSID, CPSIE</td>
|
|
<td class="enctags">T2, Change mode</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_cps" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CPSIE_T2_ASM" iformfile="cps.xml" label="interrupt enable and change mode" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="CPS">CPS, CPSID, CPSIE</td>
|
|
<td class="enctags">T2, Interrupt enable and change mode</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CPSID_T2_ASM" iformfile="cps.xml" label="interrupt disable and change mode" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="CPS">CPS, CPSID, CPSIE</td>
|
|
<td class="enctags">T2, Interrupt disable and change mode</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="bcond" title="Conditional branch">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="26" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="25" width="4" name="cond" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="21" width="6" name="imm6" usename="1">
|
|
<c colspan="6"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" name="J1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" name="J2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="10" width="11" name="imm11" usename="1">
|
|
<c colspan="11"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond<3:1><3:1>" op="!=" val="111x" />
|
|
<decode_constraint name="cond<3:1><3:1>" op="!=" val="111x" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="bcond" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="B_T3" iformfile="b.xml" first="t" last="t">
|
|
<td class="iformname" iformid="B">B</td>
|
|
<td class="enctags">T3</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="dcps" title="DCPS">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="12" settings="12">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" width="10" name="imm10" usename="1">
|
|
<c colspan="10"></c>
|
|
</box>
|
|
<box hibit="1" width="2" name="opt" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="dcps" cols="5">
|
|
<col colno="1" printwidth="9*" />
|
|
<col colno="2" printwidth="15*" />
|
|
<col colno="3" printwidth="5*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">imm4</th>
|
|
<th class="bitfields">imm10</th>
|
|
<th class="bitfields">opt</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_dcps" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="10" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_16_dcps" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="10" class="bitfield">!= 0000000000</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_dcps" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="10" class="bitfield">0000000000</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="DCPS1_T1" iformfile="dcps1.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="10" class="bitfield">0000000000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="DCPS1">DCPS1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="DCPS2_T1" iformfile="dcps2.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="10" class="bitfield">0000000000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="DCPS2">DCPS2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="DCPS3_T1" iformfile="dcps3.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="10" class="bitfield">0000000000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="DCPS3">DCPS3</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="except" title="Exception generation">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" name="o2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="except" cols="4">
|
|
<col colno="1" printwidth="4*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">o1</th>
|
|
<th class="bitfields">o2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="HVC_T1" iformfile="hvc.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="HVC">HVC</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_except" undef="1" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMC_T1_AS" iformfile="smc.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SMC">SMC</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UDF_T2" iformfile="udf.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="UDF">UDF</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="eret" title="Exception return">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="12" settings="12">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="eret" cols="3">
|
|
<col colno="1" printwidth="17*" />
|
|
<col colno="2" printwidth="23*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">Rn:imm8</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SUBS_PC_T5_AS" iformfile="sub_i.xml" first="t" last="t">
|
|
<td bitwidth="20" class="bitfield">!= 111000000000</td>
|
|
<td class="iformname" iformid="SUB_i">SUB, SUBS (immediate)</td>
|
|
<td class="enctags">T5</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ERET_T1" iformfile="eret.xml" first="t" last="t">
|
|
<td bitwidth="20" class="bitfield">111000000000</td>
|
|
<td class="iformname" iformid="ERET">ERET</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="hints" title="Hints">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="12" settings="12">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="hint" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="option" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="hints" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="8*" />
|
|
<col colno="3" printwidth="31*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">hint</th>
|
|
<th class="bitfields">option</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="NOP_T2" iformfile="nop.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="NOP">NOP</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="YIELD_T2" iformfile="yield.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td class="iformname" iformid="YIELD">YIELD</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="WFE_T2" iformfile="wfe.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td class="iformname" iformid="WFE">WFE</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="WFI_T2" iformfile="wfi.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td class="iformname" iformid="WFI">WFI</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SEV_T2" iformfile="sev.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td class="iformname" iformid="SEV">SEV</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SEVL_T2" iformfile="sevl.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td class="iformname" iformid="SEVL">SEVL</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_17_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="4" class="bitfield">011x</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_18_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="4" class="bitfield">1xxx</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ESB_T1" arch_version="FEAT_RAS" iformfile="esb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="ESB">ESB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_20_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TSB_T1" arch_version="FEAT_TRF" iformfile="tsb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td class="iformname" iformid="TSB">TSB CSYNC</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_22_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CSDB_T1" iformfile="csdb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td class="iformname" iformid="CSDB">CSDB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_24_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CLRBHB_T1" arch_version="FEAT_CLRBHB" iformfile="clrbhb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td class="iformname" iformid="CLRBHB">CLRBHB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_26_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_27_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="4" class="bitfield">1xxx</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_28_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001x</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_29_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01xx</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_30_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10xx</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_31_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110x</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_32_hints" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="DBG_T1" iformfile="dbg.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="DBG">DBG</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="mrs_bank" title="MRS (banked)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" name="R" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="m1" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="4" name="m" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="mrs_bank" cols="2">
|
|
<col colno="1" printwidth="23*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MRS_br_T1_AS" iformfile="mrs_br.xml" first="t" last="t">
|
|
<td class="iformname" iformid="MRS_br">MRS (Banked register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="mrs_spec" title="MRS (special)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" name="R" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="mrs_spec" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MRS_T1_AS" iformfile="mrs.xml" first="t" last="t">
|
|
<td class="iformname" iformid="MRS">MRS</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="msr_bank" title="MSR (banked)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="R" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" width="4" name="m1" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="4" name="m" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="msr_bank" cols="2">
|
|
<col colno="1" printwidth="23*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MSR_br_T1_AS" iformfile="msr_br.xml" first="t" last="t">
|
|
<td class="iformname" iformid="MSR_br">MSR (Banked register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="msr_spec" title="MSR (special)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="R" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" width="4" name="mask" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="msr_spec" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MSR_r_T1_AS" iformfile="msr_r.xml" first="t" last="t">
|
|
<td class="iformname" iformid="MSR_r">MSR (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="system" title="Miscellaneous system">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="12" settings="12">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="opc" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="option" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="system" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">option</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_system" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CLREX_T1" iformfile="clrex.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="CLREX">CLREX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_system" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="DSB_T1" iformfile="dsb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="4" class="bitfield">!= 0x00</td>
|
|
<td class="iformname" iformid="DSB">DSB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SSBB_T1" iformfile="ssbb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="SSBB">SSBB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PSSBB_T1" iformfile="pssbb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td class="iformname" iformid="PSSBB">PSSBB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="DMB_T1" iformfile="dmb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="DMB">DMB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ISB_T1" iformfile="isb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ISB">ISB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SB_T1" arch_version="FEAT_SB" iformfile="sb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SB">SB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_system" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1xxx</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="b" title="Unconditional branch">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="26" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="25" width="10" name="imm10" usename="1">
|
|
<c colspan="10"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" name="J1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="11" name="J2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="10" width="11" name="imm11" usename="1">
|
|
<c colspan="11"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="b" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="B_T4" iformfile="b.xml" first="t" last="t">
|
|
<td class="iformname" iformid="B">B</td>
|
|
<td class="enctags">T4</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="bl" title="Unconditional branch and link">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="26" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="25" width="10" name="imm10" usename="1">
|
|
<c colspan="10"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="13" name="J1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="11" name="J2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="10" width="11" name="imm11" usename="1">
|
|
<c colspan="11"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="bl" cols="2">
|
|
<col colno="1" printwidth="21*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="BL_i_T1" iformfile="bl_i.xml" first="t" last="t">
|
|
<td class="iformname" iformid="BL_i">BL, BLX (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="blx" title="Unconditional branch and link exchange">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="26" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="25" width="10" name="imm10" usename="1">
|
|
<c colspan="10"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="13" name="J1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" name="J2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="10" width="11" name="imm11" usename="1">
|
|
<c colspan="11"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="blx" cols="2">
|
|
<col colno="1" printwidth="21*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="BL_i_T2" iformfile="bl_i.xml" first="t" last="t">
|
|
<td class="iformname" iformid="BL_i">BL, BLX (immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="ldst">Load/store single</funcgroupheader>
|
|
<iclass_sect id="ldlit_signed" title="Load, signed (literal)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldlit_signed" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="31*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">Rt</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDRSB_l_T1" iformfile="ldrsb_l.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRSB_l">LDRSB (literal)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLI_i_T3" iformfile="pli_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLI_i">PLI (immediate, literal)</td>
|
|
<td class="enctags">T3</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_l_T1" iformfile="ldrsh_l.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRSH_l">LDRSH (literal)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_14_ldlit_signed" reserved_nop_hint="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_ldlit_signed" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldlit_unsigned" title="Load, unsigned (literal)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldlit_unsigned" cols="5">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">Rt</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="PLD_l_T1" iformfile="pld_l.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLD_l">PLD (literal)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_l_T1" iformfile="ldrb_l.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRB_l">LDRB (literal)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_l_T1" iformfile="ldrh_l.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRH_l">LDRH (literal)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_l_T2" iformfile="ldr_l.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="LDR_l">LDR (literal)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_ldlit_unsigned" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_signed_post" title="Load/store, signed (immediate, post-indexed)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_signed_post" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="19*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDRSB_i_T2_post" iformfile="ldrsb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="LDRSB_i">LDRSB (immediate)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_i_T2_post" iformfile="ldrsh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRSH_i">LDRSH (immediate)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_ldst_signed_post" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_signed_pre" title="Load/store, signed (immediate, pre-indexed)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="9" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_signed_pre" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="19*" />
|
|
<col colno="3" printwidth="17*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDRSB_i_T2_pre" iformfile="ldrsb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="LDRSB_i">LDRSB (immediate)</td>
|
|
<td class="enctags">T2, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_i_T2_pre" iformfile="ldrsh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRSH_i">LDRSH (immediate)</td>
|
|
<td class="enctags">T2, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_ldst_signed_pre" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_signed_nimm" title="Load/store, signed (negative immediate)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_signed_nimm" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="31*" />
|
|
<col colno="4" printwidth="12*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">Rt</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDRSB_i_T2_off" iformfile="ldrsb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRSB_i">LDRSB (immediate)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLI_i_T2" iformfile="pli_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLI_i">PLI (immediate, literal)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_i_T2_off" iformfile="ldrsh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRSH_i">LDRSH (immediate)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_14_ldst_signed_nimm" reserved_nop_hint="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_ldst_signed_nimm" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_signed_pimm" title="Load/store, signed (positive immediate)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_signed_pimm" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="31*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">Rt</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDRSB_i_T1" iformfile="ldrsb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRSB_i">LDRSB (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLI_i_T1" iformfile="pli_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLI_i">PLI (immediate, literal)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_i_T1" iformfile="ldrsh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRSH_i">LDRSH (immediate)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_14_ldst_signed_pimm" reserved_nop_hint="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_signed_reg" title="Load/store, signed (register offset)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="6" settings="6">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="5" width="2" name="imm2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_signed_reg" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="31*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">Rt</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDRSB_r_T2" iformfile="ldrsb_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRSB_r">LDRSB (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLI_r_T1" iformfile="pli_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLI_r">PLI (register)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_r_T2" iformfile="ldrsh_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRSH_r">LDRSH (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_14_ldst_signed_reg" reserved_nop_hint="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_ldst_signed_reg" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_signed_unpriv" title="Load/store, signed (unprivileged)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_signed_unpriv" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDRSBT_T1" iformfile="ldrsbt.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="LDRSBT">LDRSBT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSHT_T1" iformfile="ldrsht.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRSHT">LDRSHT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_ldst_signed_unpriv" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_unsigned_post" title="Load/store, unsigned (immediate, post-indexed)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_unsigned_post" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRB_i_T3_post" iformfile="strb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRB_i">STRB (immediate)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_i_T3_post" iformfile="ldrb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRB_i">LDRB (immediate)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRH_i_T3_post" iformfile="strh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRH_i">STRH (immediate)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_i_T3_post" iformfile="ldrh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRH_i">LDRH (immediate)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STR_i_T4_post" iformfile="str_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STR_i">STR (immediate)</td>
|
|
<td class="enctags">T4, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_i_T4_post" iformfile="ldr_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDR_i">LDR (immediate)</td>
|
|
<td class="enctags">T4, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_ldst_unsigned_post" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_unsigned_pre" title="Load/store, unsigned (immediate, pre-indexed)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="9" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_unsigned_pre" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="17*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRB_i_T3_pre" iformfile="strb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRB_i">STRB (immediate)</td>
|
|
<td class="enctags">T3, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_i_T3_pre" iformfile="ldrb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRB_i">LDRB (immediate)</td>
|
|
<td class="enctags">T3, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRH_i_T3_pre" iformfile="strh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRH_i">STRH (immediate)</td>
|
|
<td class="enctags">T3, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_i_T3_pre" iformfile="ldrh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRH_i">LDRH (immediate)</td>
|
|
<td class="enctags">T3, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STR_i_T4_pre" iformfile="str_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STR_i">STR (immediate)</td>
|
|
<td class="enctags">T4, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_i_T4_pre" iformfile="ldr_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDR_i">LDR (immediate)</td>
|
|
<td class="enctags">T4, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_ldst_unsigned_pre" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_unsigned_nimm" title="Load/store, unsigned (negative immediate)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_unsigned_nimm" cols="5">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="23*" />
|
|
<col colno="5" printwidth="19*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">Rt</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRB_i_T3_offn" iformfile="strb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRB_i">STRB (immediate)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_i_T3_off" iformfile="ldrb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRB_i">LDRB (immediate)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLD_i_T2" iformfile="pld_i.xml" label="preload read" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLD_i">PLD, PLDW (immediate)</td>
|
|
<td class="enctags">T2, Preload read</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRH_i_T3_offn" iformfile="strh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRH_i">STRH (immediate)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_i_T3_off" iformfile="ldrh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRH_i">LDRH (immediate)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLDW_i_T2" iformfile="pld_i.xml" label="preload write" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLD_i">PLD, PLDW (immediate)</td>
|
|
<td class="enctags">T2, Preload write</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STR_i_T4_off" iformfile="str_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STR_i">STR (immediate)</td>
|
|
<td class="enctags">T4, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_i_T4_off" iformfile="ldr_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="LDR_i">LDR (immediate)</td>
|
|
<td class="enctags">T4, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_19_ldst_unsigned_nimm" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_unsigned_pimm" title="Load/store, unsigned (positive immediate)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_unsigned_pimm" cols="5">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="23*" />
|
|
<col colno="5" printwidth="19*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">Rt</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRB_i_T2" iformfile="strb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRB_i">STRB (immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_i_T2" iformfile="ldrb_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRB_i">LDRB (immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLD_i_T1" iformfile="pld_i.xml" label="preload read" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLD_i">PLD, PLDW (immediate)</td>
|
|
<td class="enctags">T1, Preload read</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRH_i_T2" iformfile="strh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRH_i">STRH (immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_i_T2" iformfile="ldrh_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRH_i">LDRH (immediate)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLDW_i_T1" iformfile="pld_i.xml" label="preload write" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLD_i">PLD, PLDW (immediate)</td>
|
|
<td class="enctags">T1, Preload write</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STR_i_T3" iformfile="str_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STR_i">STR (immediate)</td>
|
|
<td class="enctags">T3</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_i_T3" iformfile="ldr_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="LDR_i">LDR (immediate)</td>
|
|
<td class="enctags">T3</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_unsigned_reg" title="Load/store, unsigned (register offset)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="6" settings="6">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="5" width="2" name="imm2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_unsigned_reg" cols="5">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="22*" />
|
|
<col colno="5" printwidth="19*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">Rt</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRB_r_T2" iformfile="strb_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRB_r">STRB (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_r_T2" iformfile="ldrb_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRB_r">LDRB (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLD_r_T1" iformfile="pld_r.xml" label="preload read" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLD_r">PLD, PLDW (register)</td>
|
|
<td class="enctags">T1, Preload read</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRH_r_T2" iformfile="strh_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRH_r">STRH (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_r_T2" iformfile="ldrh_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRH_r">LDRH (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLDW_r_T1" iformfile="pld_r.xml" label="preload write" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLD_r">PLD, PLDW (register)</td>
|
|
<td class="enctags">T1, Preload write</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STR_r_T2" iformfile="str_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STR_r">STR (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_r_T2" iformfile="ldr_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="LDR_r">LDR (register)</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_19_ldst_unsigned_reg" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldst_unsigned_unpriv" title="Load/store, unsigned (unprivileged)">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
<decode_constraint name="Rn" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_unsigned_unpriv" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRBT_T1" iformfile="strbt.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRBT">STRBT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRBT_T1" iformfile="ldrbt.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRBT">LDRBT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRHT_T1" iformfile="strht.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRHT">STRHT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRHT_T1" iformfile="ldrht.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRHT">LDRHT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRT_T1" iformfile="strt.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRT">STRT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRT_T1" iformfile="ldrt.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRT">LDRT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_ldst_unsigned_unpriv" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="vldst">Advanced SIMD element or structure load/store</funcgroupheader>
|
|
<iclass_sect id="asimldall" title="Advanced SIMD load single structure to all lanes">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="N" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="5" name="T" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="a" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="asimldall" cols="6">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="9*" />
|
|
<col colno="5" printwidth="48*" />
|
|
<col colno="6" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">N</th>
|
|
<th class="bitfields">a</th>
|
|
<th class="bitfields">Rm</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_asimldall" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_a_T1_postr" iformfile="vld1_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_a">VLD1 (single element to all lanes)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_a_T1_posti" iformfile="vld1_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_a">VLD1 (single element to all lanes)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_a_T1_nowb" iformfile="vld1_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_a">VLD1 (single element to all lanes)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_a_T1_postr" iformfile="vld2_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_a">VLD2 (single 2-element structure to all lanes)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_a_T1_posti" iformfile="vld2_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_a">VLD2 (single 2-element structure to all lanes)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_a_T1_nowb" iformfile="vld2_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_a">VLD2 (single 2-element structure to all lanes)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_a_T1_postr" iformfile="vld3_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD3_a">VLD3 (single 3-element structure to all lanes)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_a_T1_posti" iformfile="vld3_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD3_a">VLD3 (single 3-element structure to all lanes)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_a_T1_nowb" iformfile="vld3_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD3_a">VLD3 (single 3-element structure to all lanes)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_asimldall" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_a_T1_postr" iformfile="vld4_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD4_a">VLD4 (single 4-element structure to all lanes)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_a_T1_posti" iformfile="vld4_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD4_a">VLD4 (single 4-element structure to all lanes)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_a_T1_nowb" iformfile="vld4_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD4_a">VLD4 (single 4-element structure to all lanes)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="asimldstms" title="Advanced SIMD load/store multiple structures">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="itype" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="5" width="2" name="align" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="asimldstms" cols="5">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="7*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="38*" />
|
|
<col colno="5" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">itype</th>
|
|
<th class="bitfields">Rm</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VST4_m_T1_postr" iformfile="vst4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST4_m">VST4 (multiple 4-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_m_T1_posti" iformfile="vst4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST4_m">VST4 (multiple 4-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_m_T1_nowb" iformfile="vst4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST4_m">VST4 (multiple 4-element structures)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T4_postr" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T4, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T4_posti" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T4, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T4_nowb" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T4, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_T2_postr" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_T2_posti" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_T2_nowb" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_m_T1_postr" iformfile="vst3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST3_m">VST3 (multiple 3-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_m_T1_posti" iformfile="vst3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST3_m">VST3 (multiple 3-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_m_T1_nowb" iformfile="vst3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST3_m">VST3 (multiple 3-element structures)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T3_postr" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T3_posti" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T3_nowb" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T1_postr" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T1_posti" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T1_nowb" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_T1_postr" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_T1_posti" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_T1_nowb" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T2_postr" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T2_posti" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_T2_nowb" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_m_T1_postr" iformfile="vld4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD4_m">VLD4 (multiple 4-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_m_T1_posti" iformfile="vld4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD4_m">VLD4 (multiple 4-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_m_T1_nowb" iformfile="vld4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD4_m">VLD4 (multiple 4-element structures)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T4_postr" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T4, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T4_posti" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T4, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T4_nowb" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T4, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_T2_postr" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_T2_posti" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_T2_nowb" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_m_T1_postr" iformfile="vld3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD3_m">VLD3 (multiple 3-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_m_T1_posti" iformfile="vld3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD3_m">VLD3 (multiple 3-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_m_T1_nowb" iformfile="vld3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD3_m">VLD3 (multiple 3-element structures)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_59_asimldstms" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T3_postr" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T3_posti" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T3_nowb" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T1_postr" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T1_posti" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T1_nowb" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_60_asimldstms" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">11xx</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_T1_postr" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_T1_posti" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_T1_nowb" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T2_postr" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T2_posti" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_T2_nowb" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="asimldstss" title="Advanced SIMD load/store single structure to one lane">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" name="size" usename="1" settings="2" constraint="!= 11">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="N" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" width="4" name="index_align" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="asimldstss" cols="6">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="4*" />
|
|
<col colno="4" printwidth="9*" />
|
|
<col colno="5" printwidth="49*" />
|
|
<col colno="6" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">N</th>
|
|
<th class="bitfields">Rm</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VST1_1_T1_postr" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_T1_posti" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_T1_nowb" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_T1_postr" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_T1_posti" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_T1_nowb" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_T1_postr" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_T1_posti" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_T1_nowb" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_T1_postr" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_T1_posti" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_T1_nowb" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_T2_postr" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_T2_posti" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_T2_nowb" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_T2_postr" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_T2_posti" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_T2_nowb" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_T2_postr" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_T2_posti" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_T2_nowb" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_T2_postr" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_T2_posti" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_T2_nowb" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_T3_postr" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_T3_posti" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_T3_nowb" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_T3_postr" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_T3_posti" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_T3_nowb" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_T3_postr" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_T3_posti" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_T3_nowb" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_T3_postr" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_T3_posti" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_T3_nowb" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_T1_postr" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_T1_posti" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_T1_nowb" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_T1_postr" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_T1_posti" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_T1_nowb" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_T1_postr" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_T1_posti" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_T1_nowb" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_T1_postr" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_T1_posti" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">T1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_T1_nowb" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">T1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_T2_postr" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_T2_posti" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_T2_nowb" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_T2_postr" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_T2_posti" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_T2_nowb" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_T2_postr" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_T2_posti" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_T2_nowb" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_T2_postr" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_T2_posti" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">T2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_T2_nowb" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">T2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_T3_postr" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_T3_posti" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_T3_nowb" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_T3_postr" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_T3_posti" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_T3_nowb" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_T3_postr" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_T3_posti" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_T3_nowb" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_T3_postr" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_T3_posti" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">T3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_T3_nowb" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">T3, Offset</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="reg">Data-processing (register)</funcgroupheader>
|
|
<iclass_sect id="dpint_2r" title="Data-processing (two source registers)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" width="3" name="op1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="5" width="2" name="op2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="dpint_2r" cols="4">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="5*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="13*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">op2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="QADD_T1" iformfile="qadd.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="QADD">QADD</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QDADD_T1" iformfile="qdadd.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="QDADD">QDADD</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QSUB_T1" iformfile="qsub.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="QSUB">QSUB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QDSUB_T1" iformfile="qdsub.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="QDSUB">QDSUB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="REV_T2" iformfile="rev.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="REV">REV</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="REV16_T2" iformfile="rev16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="REV16">REV16</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RBIT_T1" iformfile="rbit.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="RBIT">RBIT</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="REVSH_T2" iformfile="revsh.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="REVSH">REVSH</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SEL_T1" iformfile="sel.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SEL">SEL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_dpint_2r" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_dpint_2r" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CLZ_T1" iformfile="clz.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="CLZ">CLZ</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_23_dpint_2r" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_24_dpint_2r" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32B_T1" arch_version="FEAT_CRC32" iformfile="crc32.xml" label="CRC32B" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="CRC32">CRC32</td>
|
|
<td class="enctags">T1, CRC32B</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32H_T1" arch_version="FEAT_CRC32" iformfile="crc32.xml" label="CRC32H" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="CRC32">CRC32</td>
|
|
<td class="enctags">T1, CRC32H</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32W_T1" arch_version="FEAT_CRC32" iformfile="crc32.xml" label="CRC32W" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="CRC32">CRC32</td>
|
|
<td class="enctags">T1, CRC32W</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNPREDICTABLE_28_dpint_2r" unpred="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname">UNPREDICTABLE</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32CB_T1" arch_version="FEAT_CRC32" iformfile="crc32c.xml" label="CRC32CB" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="CRC32C">CRC32C</td>
|
|
<td class="enctags">T1, CRC32CB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32CH_T1" arch_version="FEAT_CRC32" iformfile="crc32c.xml" label="CRC32CH" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="CRC32C">CRC32C</td>
|
|
<td class="enctags">T1, CRC32CH</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32CW_T1" arch_version="FEAT_CRC32" iformfile="crc32c.xml" label="CRC32CW" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="CRC32C">CRC32C</td>
|
|
<td class="enctags">T1, CRC32CW</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNPREDICTABLE_32_dpint_2r" unpred="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname">UNPREDICTABLE</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_33_dpint_2r" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">11x</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="addsub_par" title="Parallel add-subtract">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" width="3" name="op1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="6" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="H" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="addsub_par" cols="6">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="18*" />
|
|
<col colno="6" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">H</th>
|
|
<th class="bitfields">S</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SADD8_T1" iformfile="sadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SADD8">SADD8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QADD8_T1" iformfile="qadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="QADD8">QADD8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHADD8_T1" iformfile="shadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHADD8">SHADD8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UADD8_T1" iformfile="uadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UADD8">UADD8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQADD8_T1" iformfile="uqadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="UQADD8">UQADD8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHADD8_T1" iformfile="uhadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UHADD8">UHADD8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_18_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SADD16_T1" iformfile="sadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SADD16">SADD16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QADD16_T1" iformfile="qadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="QADD16">QADD16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHADD16_T1" iformfile="shadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHADD16">SHADD16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UADD16_T1" iformfile="uadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UADD16">UADD16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQADD16_T1" iformfile="uqadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="UQADD16">UQADD16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHADD16_T1" iformfile="uhadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UHADD16">UHADD16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_26_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SASX_T1" iformfile="sasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SASX">SASX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QASX_T1" iformfile="qasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="QASX">QASX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHASX_T1" iformfile="shasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHASX">SHASX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_30_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UASX_T1" iformfile="uasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UASX">UASX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQASX_T1" iformfile="uqasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="UQASX">UQASX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHASX_T1" iformfile="uhasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UHASX">UHASX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_34_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SSUB8_T1" iformfile="ssub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SSUB8">SSUB8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QSUB8_T1" iformfile="qsub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="QSUB8">QSUB8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHSUB8_T1" iformfile="shsub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHSUB8">SHSUB8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_38_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USUB8_T1" iformfile="usub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="USUB8">USUB8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQSUB8_T1" iformfile="uqsub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="UQSUB8">UQSUB8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHSUB8_T1" iformfile="uhsub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UHSUB8">UHSUB8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_42_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SSUB16_T1" iformfile="ssub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SSUB16">SSUB16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QSUB16_T1" iformfile="qsub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="QSUB16">QSUB16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHSUB16_T1" iformfile="shsub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHSUB16">SHSUB16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_46_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USUB16_T1" iformfile="usub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="USUB16">USUB16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQSUB16_T1" iformfile="uqsub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="UQSUB16">UQSUB16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHSUB16_T1" iformfile="uhsub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UHSUB16">UHSUB16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_50_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SSAX_T1" iformfile="ssax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SSAX">SSAX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QSAX_T1" iformfile="qsax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="QSAX">QSAX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHSAX_T1" iformfile="shsax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHSAX">SHSAX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_54_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USAX_T1" iformfile="usax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="USAX">USAX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQSAX_T1" iformfile="uqsax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="UQSAX">UQSAX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHSAX_T1" iformfile="uhsax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UHSAX">UHSAX</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_58_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_59_addsub_par" undef="1" oneofthismnem="13" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="extendr" title="Register extends">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="op1" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" width="2" name="rotate" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="extendr" cols="5">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">Rn</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SXTAH_T1" iformfile="sxtah.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SXTAH">SXTAH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTH_T2" iformfile="sxth.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="SXTH">SXTH</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTAH_T1" iformfile="uxtah.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="UXTAH">UXTAH</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTH_T2" iformfile="uxth.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="UXTH">UXTH</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTAB16_T1" iformfile="sxtab16.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SXTAB16">SXTAB16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTB16_T1" iformfile="sxtb16.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="SXTB16">SXTB16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTAB16_T1" iformfile="uxtab16.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="UXTAB16">UXTAB16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTB16_T1" iformfile="uxtb16.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="UXTB16">UXTB16</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTAB_T1" iformfile="sxtab.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SXTAB">SXTAB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTB_T2" iformfile="sxtb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="SXTB">SXTB</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTAB_T1" iformfile="uxtab.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="UXTAB">UXTAB</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTB_T2" iformfile="uxtb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="UXTB">UXTB</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_23_extendr" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="shiftr" title="Register shifts">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="stype" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rs" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="shiftr" cols="2">
|
|
<col colno="1" printwidth="39*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MOVS_rr_T2" iformfile="mov_rr.xml" first="t" last="t">
|
|
<td class="iformname" iformid="MOV_rr">MOV, MOVS (register-shifted register)</td>
|
|
<td class="enctags">T2, Flag setting</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="mul">Multiply, multiply accumulate, and absolute difference</funcgroupheader>
|
|
<iclass_sect id="mul_abd" title="Multiply and absolute difference">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="3" name="op1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Ra" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="5" width="2" name="op2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="mul_abd" cols="5">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="5*" />
|
|
<col colno="4" printwidth="32*" />
|
|
<col colno="5" printwidth="12*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">Ra</th>
|
|
<th class="bitfields">op2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MLA_T1" iformfile="mla.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="MLA">MLA, MLAS</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MLS_T1" iformfile="mls.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="MLS">MLS</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_mul_abd" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MUL_T2" iformfile="mul.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="MUL">MUL, MULS</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLABB_T1" iformfile="smlabb.xml" label="SMLABB" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMLABB">SMLABB, SMLABT, SMLATB, SMLATT</td>
|
|
<td class="enctags">T1, SMLABB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLABT_T1" iformfile="smlabb.xml" label="SMLABT" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMLABB">SMLABB, SMLABT, SMLATB, SMLATT</td>
|
|
<td class="enctags">T1, SMLABT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLATB_T1" iformfile="smlabb.xml" label="SMLATB" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="SMLABB">SMLABB, SMLABT, SMLATB, SMLATT</td>
|
|
<td class="enctags">T1, SMLATB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLATT_T1" iformfile="smlabb.xml" label="SMLATT" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="SMLABB">SMLABB, SMLABT, SMLATB, SMLATT</td>
|
|
<td class="enctags">T1, SMLATT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULBB_T1" iformfile="smulbb.xml" label="SMULBB" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMULBB">SMULBB, SMULBT, SMULTB, SMULTT</td>
|
|
<td class="enctags">T1, SMULBB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULBT_T1" iformfile="smulbb.xml" label="SMULBT" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMULBB">SMULBB, SMULBT, SMULTB, SMULTT</td>
|
|
<td class="enctags">T1, SMULBT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULTB_T1" iformfile="smulbb.xml" label="SMULTB" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="SMULBB">SMULBB, SMULBT, SMULTB, SMULTT</td>
|
|
<td class="enctags">T1, SMULTB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULTT_T1" iformfile="smulbb.xml" label="SMULTT" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="SMULBB">SMULBB, SMULBT, SMULTB, SMULTT</td>
|
|
<td class="enctags">T1, SMULTT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLAD_T1" iformfile="smlad.xml" label="SMLAD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMLAD">SMLAD, SMLADX</td>
|
|
<td class="enctags">T1, SMLAD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLADX_T1" iformfile="smlad.xml" label="SMLADX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMLAD">SMLAD, SMLADX</td>
|
|
<td class="enctags">T1, SMLADX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_27_mul_abd" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMUAD_T1" iformfile="smuad.xml" label="SMUAD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMUAD">SMUAD, SMUADX</td>
|
|
<td class="enctags">T1, SMUAD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMUADX_T1" iformfile="smuad.xml" label="SMUADX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMUAD">SMUAD, SMUADX</td>
|
|
<td class="enctags">T1, SMUADX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLAWB_T1" iformfile="smlawb.xml" label="SMLAWB" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMLAWB">SMLAWB, SMLAWT</td>
|
|
<td class="enctags">T1, SMLAWB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLAWT_T1" iformfile="smlawb.xml" label="SMLAWT" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMLAWB">SMLAWB, SMLAWT</td>
|
|
<td class="enctags">T1, SMLAWT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_32_mul_abd" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULWB_T1" iformfile="smulwb.xml" label="SMULWB" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMULWB">SMULWB, SMULWT</td>
|
|
<td class="enctags">T1, SMULWB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULWT_T1" iformfile="smulwb.xml" label="SMULWT" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMULWB">SMULWB, SMULWT</td>
|
|
<td class="enctags">T1, SMULWT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLSD_T1" iformfile="smlsd.xml" label="SMLSD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMLSD">SMLSD, SMLSDX</td>
|
|
<td class="enctags">T1, SMLSD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLSDX_T1" iformfile="smlsd.xml" label="SMLSDX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMLSD">SMLSD, SMLSDX</td>
|
|
<td class="enctags">T1, SMLSDX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_37_mul_abd" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMUSD_T1" iformfile="smusd.xml" label="SMUSD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMUSD">SMUSD, SMUSDX</td>
|
|
<td class="enctags">T1, SMUSD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMUSDX_T1" iformfile="smusd.xml" label="SMUSDX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMUSD">SMUSD, SMUSDX</td>
|
|
<td class="enctags">T1, SMUSDX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMLA_T1" iformfile="smmla.xml" label="SMMLA" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMMLA">SMMLA, SMMLAR</td>
|
|
<td class="enctags">T1, SMMLA</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMLAR_T1" iformfile="smmla.xml" label="SMMLAR" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMMLA">SMMLA, SMMLAR</td>
|
|
<td class="enctags">T1, SMMLAR</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_42_mul_abd" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMUL_T1" iformfile="smmul.xml" label="SMMUL" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMMUL">SMMUL, SMMULR</td>
|
|
<td class="enctags">T1, SMMUL</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMULR_T1" iformfile="smmul.xml" label="SMMULR" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMMUL">SMMUL, SMMULR</td>
|
|
<td class="enctags">T1, SMMULR</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMLS_T1" iformfile="smmls.xml" label="SMMLS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SMMLS">SMMLS, SMMLSR</td>
|
|
<td class="enctags">T1, SMMLS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMLSR_T1" iformfile="smmls.xml" label="SMMLSR" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SMMLS">SMMLS, SMMLSR</td>
|
|
<td class="enctags">T1, SMMLSR</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_45_mul_abd" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USADA8_T1" iformfile="usada8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="USADA8">USADA8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_48_mul_abd" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_49_mul_abd" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USAD8_T1" iformfile="usad8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="USAD8">USAD8</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="t_simd_3r_same">Advanced SIMD three registers of the same length</funcgroupheader>
|
|
<iclass_sect id="simd_3same" title="Advanced SIMD three registers of the same length">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="28" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="opc" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd_3same" cols="7">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="6*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="4*" />
|
|
<col colno="6" printwidth="31*" />
|
|
<col colno="7" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="5">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">Q</th>
|
|
<th class="bitfields">o1</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VFMA_T1_Q" iformfile="vfma.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMA">VFMA</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADD_f_T1_Q" iformfile="vadd_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VADD_f">VADD (floating-point)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLA_f_T1_Q" iformfile="vmla_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMLA_f">VMLA (floating-point)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t2" iformfile="vceq_r.xml" label="T2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCEQ_r">VCEQ (register)</td>
|
|
<td class="enctags">T2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMAX_f_T1_Q" iformfile="vmax_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMAX_f">VMAX (floating-point)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRECPS_T1_Q" iformfile="vrecps.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRECPS">VRECPS</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VHADD_T1_Q" iformfile="vhadd.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VHADD">VHADD</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VAND_r_T1_Q" iformfile="vand_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VAND_r">VAND (register)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQADD_T1_Q" iformfile="vqadd.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQADD">VQADD</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRHADD_T1_Q" iformfile="vrhadd.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRHADD">VRHADD</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1C_T1" arch_version="FEAT_SHA1" iformfile="sha1c.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA1C">SHA1C</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VHSUB_T1_Q" iformfile="vhsub.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VHSUB">VHSUB</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VBIC_r_T1_Q" iformfile="vbic_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBIC_r">VBIC (register)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSUB_T1_Q" iformfile="vqsub.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQSUB">VQSUB</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t1" iformfile="vcgt_r.xml" label="T1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCGT_r">VCGT (register)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t1" iformfile="vcge_r.xml" label="T1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCGE_r">VCGE (register)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1P_T1" arch_version="FEAT_SHA1" iformfile="sha1p.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA1P">SHA1P</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMS_T1_Q" iformfile="vfms.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMS">VFMS</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUB_f_T1_Q" iformfile="vsub_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSUB_f">VSUB (floating-point)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_f_T1_Q" iformfile="vmls_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMLS_f">VMLS (floating-point)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_109_simd_3same" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMIN_f_T1_Q" iformfile="vmin_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMIN_f">VMIN (floating-point)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSQRTS_T1_Q" iformfile="vrsqrts.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRSQRTS">VRSQRTS</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSHL_r_T1_Q" iformfile="vshl_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSHL_r">VSHL (register)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADD_i_T1_Q" iformfile="vadd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VADD_i">VADD (integer)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VORR_r_T1_Q" iformfile="vorr_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VORR_r">VORR (register)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VTST_T1_Q" iformfile="vtst.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VTST">VTST</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSHL_r_T1_Q" iformfile="vqshl_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQSHL_r">VQSHL (register)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLA_i_T1_Q" iformfile="vmla_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMLA_i">VMLA (integer)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSHL_T1_Q" iformfile="vrshl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRSHL">VRSHL</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRSHL_T1_Q" iformfile="vqrshl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQRSHL">VQRSHL</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMULH_T1_Q" iformfile="vqdmulh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VQDMULH">VQDMULH</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1M_T1" arch_version="FEAT_SHA1" iformfile="sha1m.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA1M">SHA1M</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPADD_i_T1" iformfile="vpadd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VPADD_i">VPADD (integer)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMAX_i_T1_Q" iformfile="vmax_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMAX_i">VMAX (integer)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VORN_r_T1_Q" iformfile="vorn_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VORN_r">VORN (register)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMIN_i_T1_Q" iformfile="vmin_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMIN_i">VMIN (integer)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABD_i_T1_Q" iformfile="vabd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VABD_i">VABD (integer)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABA_T1_Q" iformfile="vaba.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VABA">VABA</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1SU0_T1" arch_version="FEAT_SHA1" iformfile="sha1su0.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA1SU0">SHA1SU0</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPADD_f_T1" iformfile="vpadd_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VPADD_f">VPADD (floating-point)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_f_T1_Q" iformfile="vmul_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMUL_f">VMUL (floating-point)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t2" iformfile="vcge_r.xml" label="T2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCGE_r">VCGE (register)</td>
|
|
<td class="enctags">T2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VACGE_T1_Q" iformfile="vacge.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VACGE">VACGE</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPMAX_f_T1" iformfile="vpmax_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VPMAX_f">VPMAX (floating-point)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMAXNM_T1_Q" iformfile="vmaxnm.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMAXNM">VMAXNM</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VEOR_T1_Q" iformfile="veor.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VEOR">VEOR</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_i_T1_Q" iformfile="vmul_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMUL_i">VMUL (integer and polynomial)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA256H_T1" arch_version="FEAT_SHA256" iformfile="sha256h.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA256H">SHA256H</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPMAX_i_T1" iformfile="vpmax_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VPMAX_i">VPMAX (integer)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VBSL_T1_Q" iformfile="vbsl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBSL">VBSL</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPMIN_i_T1" iformfile="vpmin_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VPMIN_i">VPMIN (integer)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_65_simd_3same" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA256H2_T1" arch_version="FEAT_SHA256" iformfile="sha256h2.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA256H2">SHA256H2</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABD_f_T1_Q" iformfile="vabd_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VABD_f">VABD (floating-point)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t2" iformfile="vcgt_r.xml" label="T2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCGT_r">VCGT (register)</td>
|
|
<td class="enctags">T2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VACGT_T1_Q" iformfile="vacgt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VACGT">VACGT</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPMIN_f_T1" iformfile="vpmin_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VPMIN_f">VPMIN (floating-point)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMINNM_T1_Q" iformfile="vminnm.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMINNM">VMINNM</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUB_i_T1_Q" iformfile="vsub_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSUB_i">VSUB (integer)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VBIT_T1_Q" iformfile="vbit.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBIT">VBIT</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t1" iformfile="vceq_r.xml" label="T1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCEQ_r">VCEQ (register)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_i_T1_Q" iformfile="vmls_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMLS_i">VMLS (integer)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMULH_T1_Q" iformfile="vqrdmulh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VQRDMULH">VQRDMULH</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA256SU1_T1" arch_version="FEAT_SHA256" iformfile="sha256su1.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA256SU1">SHA256SU1</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMLAH_T1_Q" arch_version="FEAT_RDM" iformfile="vqrdmlah.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQRDMLAH">VQRDMLAH</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VBIF_T1_Q" iformfile="vbif.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBIF">VBIF</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMLSH_T1_Q" arch_version="FEAT_RDM" iformfile="vqrdmlsh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQRDMLSH">VQRDMLSH</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_124_simd_3same" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="t_simd_mulreg">Advanced SIMD two registers, or three registers of different lengths</funcgroupheader>
|
|
<iclass_sect id="simd_dup_sc" title="Advanced SIMD duplicate (scalar)">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="9" width="3" name="opc" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd_dup_sc" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VDUP_s_T1_Q" iformfile="vdup_s.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td class="iformname" iformid="VDUP_s">VDUP (scalar)</td>
|
|
<td class="enctags">T1, </td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_simd_dup_sc" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_simd_dup_sc" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">01x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_simd_dup_sc" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">1xx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd_tbl" title="Advanced SIMD table permute">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="len" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd_tbl" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VTBX_T1" iformfile="vtbl.xml" first="t" last="t">
|
|
<td class="iformname" iformid="VTBL">VTBL, VTBX</td>
|
|
<td class="enctags">T1, VTBX</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd_3diff" title="Advanced SIMD three registers of different lengths">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="28" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="size" usename="1" settings="2" constraint="!= 11">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="opc" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="simd_3diff" cols="4">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="32*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VADDL_T1" iformfile="vaddl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="VADDL">VADDL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADDW_T1" iformfile="vaddw.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td class="iformname" iformid="VADDW">VADDW</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUBL_T1" iformfile="vsubl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td class="iformname" iformid="VSUBL">VSUBL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADDHN_T1" iformfile="vaddhn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td class="iformname" iformid="VADDHN">VADDHN</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUBW_T1" iformfile="vsubw.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td class="iformname" iformid="VSUBW">VSUBW</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUBHN_T1" iformfile="vsubhn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td class="iformname" iformid="VSUBHN">VSUBHN</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMLAL_T1" iformfile="vqdmlal.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td class="iformname" iformid="VQDMLAL">VQDMLAL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABAL_T1" iformfile="vabal.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td class="iformname" iformid="VABAL">VABAL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMLSL_T1" iformfile="vqdmlsl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td class="iformname" iformid="VQDMLSL">VQDMLSL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMULL_T1" iformfile="vqdmull.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VQDMULL">VQDMULL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABDL_i_T1" iformfile="vabdl_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td class="iformname" iformid="VABDL_i">VABDL (integer)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLAL_i_T1" iformfile="vmlal_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td class="iformname" iformid="VMLAL_i">VMLAL (integer)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLSL_i_T1" iformfile="vmlsl_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td class="iformname" iformid="VMLSL_i">VMLSL (integer)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRADDHN_T1" iformfile="vraddhn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td class="iformname" iformid="VRADDHN">VRADDHN</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSUBHN_T1" iformfile="vrsubhn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td class="iformname" iformid="VRSUBHN">VRSUBHN</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMULL_i_T1" iformfile="vmull_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">11x0</td>
|
|
<td class="iformname" iformid="VMULL_i">VMULL (integer and polynomial)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_23_simd_3diff" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_26_simd_3diff" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_29_simd_3diff" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_30_simd_3diff" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd_2r_sc" title="Advanced SIMD two registers and a scalar">
|
|
<regdiagram form="16x2" psname="" tworows="1">
|
|
<box hibit="31" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="28" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="size" usename="1" settings="2" constraint="!= 11">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="opc" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="simd_2r_sc" cols="4">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="19*" />
|
|
<col colno="4" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">Q</th>
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMLA_s_T1_Q" iformfile="vmla_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td class="iformname" iformid="VMLA_s">VMLA (by scalar)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMLAL_T2" iformfile="vqdmlal.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td class="iformname" iformid="VQDMLAL">VQDMLAL</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLAL_s_T1" iformfile="vmlal_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td class="iformname" iformid="VMLAL_s">VMLAL (by scalar)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMLSL_T2" iformfile="vqdmlsl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td class="iformname" iformid="VQDMLSL">VQDMLSL</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_s_T1_Q" iformfile="vmls_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td class="iformname" iformid="VMLS_s">VMLS (by scalar)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMULL_T2" iformfile="vqdmull.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td class="iformname" iformid="VQDMULL">VQDMULL</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLSL_s_T1" iformfile="vmlsl_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td class="iformname" iformid="VMLSL_s">VMLSL (by scalar)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_s_T1_Q" iformfile="vmul_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td class="iformname" iformid="VMUL_s">VMUL (by scalar)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_simd_2r_sc" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMULL_s_T1" iformfile="vmull_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td class="iformname" iformid="VMULL_s">VMULL (by scalar)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_simd_2r_sc" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMULH_T2_Q" iformfile="vqdmulh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td class="iformname" iformid="VQDMULH">VQDMULH</td>
|
|
<td class="enctags">T2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMULH_T2_Q" iformfile="vqrdmulh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VQRDMULH">VQRDMULH</td>
|
|
<td class="enctags">T2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_25_simd_2r_sc" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMLAH_T2_Q" arch_version="FEAT_RDM" iformfile="vqrdmlah.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td class="iformname" iformid="VQRDMLAH">VQRDMLAH</td>
|
|
<td class="enctags">T2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMLSH_T2_Q" arch_version="FEAT_RDM" iformfile="vqrdmlsh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VQRDMLSH">VQRDMLSH</td>
|
|
<td class="enctags">T2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd_2r_misc" title="Advanced SIMD two registers misc">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="17" width="2" name="opc1" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="10" width="4" name="opc2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd_2r_misc" cols="6">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="6*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="67*" />
|
|
<col colno="6" printwidth="40*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">opc1</th>
|
|
<th class="bitfields">opc2</th>
|
|
<th class="bitfields">Q</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VREV64_T1_Q" iformfile="vrev64.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VREV64">VREV64</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VREV32_T1_Q" iformfile="vrev32.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VREV32">VREV32</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VREV16_T1_Q" iformfile="vrev16.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VREV16">VREV16</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_simd_2r_misc" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPADDL_T1_Q" iformfile="vpaddl.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VPADDL">VPADDL</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="AESE_T1" arch_version="FEAT_AES" iformfile="aese.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="AESE">AESE</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="AESD_T1" arch_version="FEAT_AES" iformfile="aesd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="AESD">AESD</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="AESMC_T1" arch_version="FEAT_AES" iformfile="aesmc.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="AESMC">AESMC</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="AESIMC_T1" arch_version="FEAT_AES" iformfile="aesimc.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="AESIMC">AESIMC</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCLS_T1_Q" iformfile="vcls.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCLS">VCLS</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSWP_T1_Q" iformfile="vswp.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSWP">VSWP</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCLZ_T1_Q" iformfile="vclz.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCLZ">VCLZ</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCNT_T1_Q" iformfile="vcnt.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCNT">VCNT</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMVN_r_T1_Q" iformfile="vmvn_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VMVN_r">VMVN (register)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_76_simd_2r_misc" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPADAL_T1_Q" iformfile="vpadal.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">110x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VPADAL">VPADAL</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQABS_T1_Q" iformfile="vqabs.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VQABS">VQABS</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQNEG_T1_Q" iformfile="vqneg.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VQNEG">VQNEG</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCGT_i_T1_Q" iformfile="vcgt_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCGT_i">VCGT (immediate #0)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCGE_i_T1_Q" iformfile="vcge_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCGE_i">VCGE (immediate #0)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCEQ_i_T1_Q" iformfile="vceq_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCEQ_i">VCEQ (immediate #0)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCLE_i_T1_Q" iformfile="vcle_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCLE_i">VCLE (immediate #0)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCLT_i_T1_Q" iformfile="vclt_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCLT_i">VCLT (immediate #0)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABS_T1_Q" iformfile="vabs.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VABS">VABS</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNEG_T1_Q" iformfile="vneg.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VNEG">VNEG</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1H_T1" arch_version="FEAT_SHA1" iformfile="sha1h.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SHA1H">SHA1H</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_bfs_T1" arch_version="FEAT_AA32BF16" iformfile="vcvt_bfs.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_bfs">VCVT (from single-precision to BFloat16, Advanced SIMD)</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VTRN_T1_Q" iformfile="vtrn.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VTRN">VTRN</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUZP_T1_Q" iformfile="vuzp.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VUZP">VUZP</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VZIP_T1_Q" iformfile="vzip.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VZIP">VZIP</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOVN_T1" iformfile="vmovn.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOVN">VMOVN</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQMOVUN_T1" iformfile="vqmovn.xml" label="VQMOVUN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQMOVN">VQMOVN, VQMOVUN</td>
|
|
<td class="enctags">T1, Unsigned result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQMOVN_T1" iformfile="vqmovn.xml" label="VQMOVN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VQMOVN">VQMOVN, VQMOVUN</td>
|
|
<td class="enctags">T1, Signed result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSHLL_T2" iformfile="vshll.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSHLL">VSHLL</td>
|
|
<td class="enctags">T2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1SU1_T1" arch_version="FEAT_SHA1" iformfile="sha1su1.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA1SU1">SHA1SU1</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA256SU0_T1" arch_version="FEAT_SHA256" iformfile="sha256su0.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SHA256SU0">SHA256SU0</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTN_asimd_T1_Q" iformfile="vrintn_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTN_asimd">VRINTN (Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTX_asimd_T1_Q" iformfile="vrintx_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTX_asimd">VRINTX (Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTA_asimd_T1_Q" iformfile="vrinta_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTA_asimd">VRINTA (Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTZ_asimd_T1_Q" iformfile="vrintz_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTZ_asimd">VRINTZ (Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_78_simd_2r_misc" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_hs_T1" iformfile="vcvt_hs.xml" label="single-precision to half-precision" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVT_hs">VCVT (between half-precision and single-precision, Advanced SIMD)</td>
|
|
<td class="enctags">T1, Single-precision to half-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTM_asimd_T1_Q" iformfile="vrintm_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTM_asimd">VRINTM (Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_sh_T1" iformfile="vcvt_hs.xml" label="half-precision to single-precision" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVT_hs">VCVT (between half-precision and single-precision, Advanced SIMD)</td>
|
|
<td class="enctags">T1, Half-precision to single-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_83_simd_2r_misc" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTP_asimd_T1_Q" iformfile="vrintp_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTP_asimd">VRINTP (Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTA_asimd_T1_Q" iformfile="vcvta_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTA_asimd">VCVTA (Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTN_asimd_T1_Q" iformfile="vcvtn_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">001x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTN_asimd">VCVTN (Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTP_asimd_T1_Q" iformfile="vcvtp_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTP_asimd">VCVTP (Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTM_asimd_T1_Q" iformfile="vcvtm_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">011x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTM_asimd">VCVTM (Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRECPE_T1_Q" iformfile="vrecpe.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">10x0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRECPE">VRECPE</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSQRTE_T1_Q" iformfile="vrsqrte.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">10x1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRSQRTE">VRSQRTE</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_79_simd_2r_misc" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_is_T1_Q" iformfile="vcvt_is.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">11xx</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_is">VCVT (between floating-point and integer, Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd_ext" title="Advanced SIMD vector extract">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd_ext" cols="2">
|
|
<col colno="1" printwidth="22*" />
|
|
<col colno="2" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VEXT_T1_Q" iformfile="vext.xml" first="t" last="t">
|
|
<td class="iformname" iformid="VEXT">VEXT (byte elements)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="t_simd_12reg">Advanced SIMD shifts and immediate generation</funcgroupheader>
|
|
<iclass_sect id="simd_1r_imm" title="Advanced SIMD one register and modified immediate">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="28" name="i" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="18" width="3" name="imm3" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="cmode" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd_1r_imm" cols="4">
|
|
<col colno="1" printwidth="7*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">cmode</th>
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encoding="t1" iformfile="vmov_i.xml" label="T1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0xx0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t1" iformfile="vmvn_i.xml" label="T1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0xx0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMVN_i">VMVN (immediate)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t1" iformfile="vorr_i.xml" label="T1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0xx1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VORR_i">VORR (immediate)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t1" iformfile="vbic_i.xml" label="T1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0xx1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBIC_i">VBIC (immediate)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t3" iformfile="vmov_i.xml" label="T3" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10x0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">T3, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t2" iformfile="vmvn_i.xml" label="T2" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10x0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMVN_i">VMVN (immediate)</td>
|
|
<td class="enctags">T2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t2" iformfile="vorr_i.xml" label="T2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VORR_i">VORR (immediate)</td>
|
|
<td class="enctags">T2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t2" iformfile="vbic_i.xml" label="T2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10x1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBIC_i">VBIC (immediate)</td>
|
|
<td class="enctags">T2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t4" iformfile="vmov_i.xml" label="T4" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11xx</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">T4, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t3" iformfile="vmvn_i.xml" label="T3" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110x</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMVN_i">VMVN (immediate)</td>
|
|
<td class="enctags">T3, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="t5" iformfile="vmov_i.xml" label="T5" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">T5, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_33_simd_1r_imm" undef="1" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd_2r_shift" title="Advanced SIMD two registers and shift amount">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="28" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="3" name="imm3H" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="imm3L" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="opc" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="imm3H:imm3L:Vd:opc:L" op="!=" val="000xxxxxxxxxxx0" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="simd_2r_shift" cols="7">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="7*" />
|
|
<col colno="4" printwidth="6*" />
|
|
<col colno="5" printwidth="3*" />
|
|
<col colno="6" printwidth="62*" />
|
|
<col colno="7" printwidth="42*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="5">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">imm3H:L</th>
|
|
<th class="bitfields">imm3L</th>
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">Q</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VSHR_T1_Q" iformfile="vshr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSHR">VSHR</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSRA_T1_Q" iformfile="vsra.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSRA">VSRA</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOVL_T1" iformfile="vmovl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOVL">VMOVL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSHR_T1_Q" iformfile="vrshr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRSHR">VRSHR</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSRA_T1_Q" iformfile="vrsra.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRSRA">VRSRA</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSHL_i_T1_Q" iformfile="vqshl_i.xml" label="VQSHL" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VQSHL_i">VQSHL, VQSHLU (immediate)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector, signed result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSHRN_T1" iformfile="vqshrn.xml" label="VQSHRN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VQSHRN">VQSHRN, VQSHRUN</td>
|
|
<td class="enctags">T1, Signed result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRSHRN_T1" iformfile="vqrshrn.xml" label="VQRSHRN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQRSHRN">VQRSHRN, VQRSHRUN</td>
|
|
<td class="enctags">T1, Signed result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSHLL_T1" iformfile="vshll.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSHLL">VSHLL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_xs_T1_Q" iformfile="vcvt_xs.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">11xx</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xs">VCVT (between floating-point and fixed-point, Advanced SIMD)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSHL_i_T1_Q" iformfile="vshl_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSHL_i">VSHL (immediate)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSHRN_T1" iformfile="vshrn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSHRN">VSHRN</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSHRN_T1" iformfile="vrshrn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRSHRN">VRSHRN</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSRI_T1_Q" iformfile="vsri.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSRI">VSRI</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSLI_T1_Q" iformfile="vsli.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSLI">VSLI</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSHLU_i_T1_Q" iformfile="vqshl_i.xml" label="VQSHLU" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VQSHL_i">VQSHL, VQSHLU (immediate)</td>
|
|
<td class="enctags">T1, 128-bit SIMD vector, unsigned result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSHRUN_T1" iformfile="vqshrn.xml" label="VQSHRUN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VQSHRN">VQSHRN, VQSHRUN</td>
|
|
<td class="enctags">T1, Unsigned result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRSHRUN_T1" iformfile="vqrshrn.xml" label="VQRSHRUN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQRSHRN">VQRSHRN, VQRSHRUN</td>
|
|
<td class="enctags">T1, Unsigned result</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="lmul">Long multiply, long multiply accumulate, and divide</funcgroupheader>
|
|
<iclass_sect id="lmul_div" title="Long multiply and divide">
|
|
<regdiagram form="16x2" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" width="3" name="op1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="RdLo" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="RdHi" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="lmul_div" cols="4">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="36*" />
|
|
<col colno="4" printwidth="13*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">op2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">!= 0000</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULL_T1" iformfile="smull.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="SMULL">SMULL, SMULLS</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SDIV_T1" iformfile="sdiv.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="SDIV">SDIV</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_16_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="4" class="bitfield">!= 0000</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UMULL_T1" iformfile="umull.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="UMULL">UMULL, UMULLS</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UDIV_T1" iformfile="udiv.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="UDIV">UDIV</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLAL_T1" iformfile="smlal.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="SMLAL">SMLAL, SMLALS</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">001x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">01xx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLALBB_T1" iformfile="smlalbb.xml" label="SMLALBB" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td class="iformname" iformid="SMLALBB">SMLALBB, SMLALBT, SMLALTB, SMLALTT</td>
|
|
<td class="enctags">T1, SMLALBB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLALBT_T1" iformfile="smlalbb.xml" label="SMLALBT" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td class="iformname" iformid="SMLALBB">SMLALBB, SMLALBT, SMLALTB, SMLALTT</td>
|
|
<td class="enctags">T1, SMLALBT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLALTB_T1" iformfile="smlalbb.xml" label="SMLALTB" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td class="iformname" iformid="SMLALBB">SMLALBB, SMLALBT, SMLALTB, SMLALTT</td>
|
|
<td class="enctags">T1, SMLALTB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLALTT_T1" iformfile="smlalbb.xml" label="SMLALTT" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td class="iformname" iformid="SMLALBB">SMLALBB, SMLALBT, SMLALTB, SMLALTT</td>
|
|
<td class="enctags">T1, SMLALTT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLALD_T1" iformfile="smlald.xml" label="SMLALD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td class="iformname" iformid="SMLALD">SMLALD, SMLALDX</td>
|
|
<td class="enctags">T1, SMLALD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLALDX_T1" iformfile="smlald.xml" label="SMLALDX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="SMLALD">SMLALD, SMLALDX</td>
|
|
<td class="enctags">T1, SMLALDX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_29_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield">111x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_30_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">0xxx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_31_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">10xx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLSLD_T1" iformfile="smlsld.xml" label="SMLSLD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td class="iformname" iformid="SMLSLD">SMLSLD, SMLSLDX</td>
|
|
<td class="enctags">T1, SMLSLD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLSLDX_T1" iformfile="smlsld.xml" label="SMLSLDX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="SMLSLD">SMLSLD, SMLSLDX</td>
|
|
<td class="enctags">T1, SMLSLDX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_34_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">111x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UMLAL_T1" iformfile="umlal.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="UMLAL">UMLAL, UMLALS</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_36_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_37_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield">001x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_38_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UMAAL_T1" iformfile="umaal.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td class="iformname" iformid="UMAAL">UMAAL</td>
|
|
<td class="enctags">T1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_40_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_41_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="4" class="bitfield">1xxx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_42_lmul_div" undef="1" oneofthismnem="17" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<mappings>
|
|
<mapping from="fpdp" to_isa="A32" to="fpdp" />
|
|
<mapping from="simd_1r_imm" to_isa="A32" to="simd1reg_imm" />
|
|
<mapping from="asimldstss" to_isa="A32" to="ldstv_ssone" />
|
|
<mapping from="simddp" to_isa="A32" to="advsimddp" />
|
|
<mapping from="sysldst_mov64" to_isa="A32" to="sysldst_mov64" />
|
|
<mapping from="fp_2r" to_isa="A32" to="fpdp2reg" />
|
|
<mapping from="simd_ext" to_isa="A32" to="simd3reg_ext" />
|
|
<mapping from="simd_2r_sc" to_isa="A32" to="simd2reg_scalar" />
|
|
<mapping from="simd_3diff" to_isa="A32" to="simd3reg_diff" />
|
|
<mapping from="simdfp_ldst" to_isa="A32" to="ldstsimdfp" />
|
|
<mapping from="asimldall" to_isa="A32" to="ldv_ssall" />
|
|
<mapping from="simd_3sameext" to_isa="A32" to="simd3reg_sameext" />
|
|
<mapping from="simdldst_mov64" to_isa="A32" to="simdldst_mov64" />
|
|
<mapping from="simdfp_mov64" to_isa="A32" to="movsimdfpgp64" />
|
|
<mapping from="simd_3same" to_isa="A32" to="simd3reg_same" />
|
|
<mapping from="asimldstms" to_isa="A32" to="ldstv_ms" />
|
|
<mapping from="simd_2r_scext" to_isa="A32" to="simd2reg_scalarext" />
|
|
<mapping from="fp_msr" to_isa="A32" to="movfpsr" />
|
|
<mapping from="sysreg_mov32" to_isa="A32" to="sysreg_mov32" />
|
|
<mapping from="fp_mov32" to_isa="A32" to="movfpgp32" />
|
|
<mapping from="fpsimd_mov32" to_isa="A32" to="fpsimd_mov32" />
|
|
<mapping from="simd_dup_sc" to_isa="A32" to="simd2reg_dup" />
|
|
<mapping from="fp_movi" to_isa="A32" to="fpimm" />
|
|
<mapping from="simd_2r_shift" to_isa="A32" to="simd2reg_shift" />
|
|
<mapping from="fp_minmax" to_isa="A32" to="fpminmaxnm" />
|
|
<mapping from="fp_csel" to_isa="A32" to="fpcsel" />
|
|
<mapping from="fp_toint" to_isa="A32" to="fpcvtrnd" />
|
|
<mapping from="simd_2r_misc" to_isa="A32" to="simd2reg_misc" />
|
|
<mapping from="simd_dup_el" to_isa="A32" to="movsimdgp" />
|
|
<mapping from="vldst" to_isa="A32" to="advsimdls" />
|
|
<mapping from="simd_tbl" to_isa="A32" to="simd3reg_tbl" />
|
|
<mapping from="fp_3r" to_isa="A32" to="fpdp3reg" />
|
|
</mappings>
|
|
</encodingindex>
|