288 lines
14 KiB
XML
288 lines
14 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="WFE" title="WFE -- AArch32" type="instruction">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="mnemonic" value="WFE" />
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</docvars>
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<heading>WFE</heading>
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<desc>
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<brief>
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<para>Wait For Event</para>
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</brief>
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<authored>
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<para>Wait For Event is a hint instruction that indicates that the PE can enter a low-power state and remain there until a wakeup event occurs. Wakeup events include the event signaled as a result of executing the <instruction>SEV</instruction> instruction on any PE in the multiprocessor system. For more information, see <xref linkend="CFIJIIHE">Wait For Event and Send Event</xref>.</para>
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<para>As described in <xref linkend="CFIJIIHE">Wait For Event and Send Event</xref>, the execution of a <instruction>WFE</instruction> instruction that would otherwise cause entry to a low-power state can be trapped to a higher Exception level, see:</para>
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<list type="unordered">
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<listitem><content><xref linkend="CHDJGAIC">Traps to Undefined mode of PL0 execution of WFE and WFI instructions</xref>.</content></listitem>
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<listitem><content><xref linkend="BEIBHJCJ">Traps to Hyp mode of Non-secure EL0 and EL1 execution of WFE and WFI instructions</xref>.</content></listitem>
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<listitem><content><xref linkend="CHDEGCIJ">Traps to Monitor mode of the execution of WFE and WFI instructions in modes other than Monitor mode</xref>.</content></listitem>
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</list>
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</authored>
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<encodingnotes>
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<para>For more information about the <arm-defined-word>constrained unpredictable</arm-defined-word> behavior of this instruction, see <xref linkend="CJAEGDJC">Architectural Constraints on UNPREDICTABLE behaviors</xref>.</para>
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</encodingnotes>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<classesintro count="3">
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<txt>It has encodings from the following instruction sets:</txt>
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<txt> A32 (</txt>
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<a href="#iclass_a1">A1</a>
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<txt>)</txt>
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<txt> and </txt>
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<txt> T32 (</txt>
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<a href="#iclass_t1">T1</a>
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<txt> and </txt>
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<a href="#iclass_t2">T2</a>
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<txt>)</txt>
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<txt>.</txt>
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</classesintro>
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<iclass name="A1" oneof="3" id="iclass_a1" no_encodings="1" isa="A32">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic" value="WFE" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="aarch32/instrs/WFE/A1_A.txt" tworows="1">
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<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
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<c colspan="4">!= 1111</c>
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</box>
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<box hibit="27" width="5" settings="5">
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="22" name="R" settings="1">
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<c>0</c>
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</box>
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<box hibit="21" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="19" width="2" name="imm4<3:2>" settings="2">
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="17" width="2" name="imm4<1:0>" settings="2">
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="15" settings="1">
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<c>(1)</c>
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</box>
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<box hibit="14" settings="1">
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<c>(1)</c>
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</box>
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<box hibit="13" settings="1">
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<c>(1)</c>
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</box>
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<box hibit="12" settings="1">
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<c>(1)</c>
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</box>
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<box hibit="11" width="12" name="imm12" settings="12">
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<c>(0)</c>
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<c>(0)</c>
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<c>(0)</c>
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<c>(0)</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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</regdiagram>
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<encoding name="WFE_A1" oneofinclass="1" oneof="3" label="A1">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic" value="WFE" />
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</docvars>
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<asmtemplate><text>WFE</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/WFE/A1_A.txt" mylink="aarch32.instrs.WFE.A1_A.txt" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">// No additional decoding required</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="T1" oneof="3" id="iclass_t1" no_encodings="1" isa="T32">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="WFE" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="16" psname="aarch32/instrs/WFE/T1_A.txt">
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<box hibit="31" width="8" settings="8">
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="23" width="4" name="hint" settings="4">
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="19" width="4" settings="4">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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</regdiagram>
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<encoding name="WFE_T1" oneofinclass="1" oneof="3" label="T1">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="WFE" />
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</docvars>
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<asmtemplate><text>WFE</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/WFE/T1_A.txt" mylink="aarch32.instrs.WFE.T1_A.txt" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">// No additional decoding required</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="T2" oneof="3" id="iclass_t2" no_encodings="1" isa="T32">
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<docvars>
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<docvar key="armarmheading" value="T2" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="WFE" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="16x2" psname="aarch32/instrs/WFE/T2_A.txt">
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<box hibit="31" width="12" settings="12">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="19" settings="1">
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<c>(1)</c>
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</box>
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<box hibit="18" settings="1">
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<c>(1)</c>
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</box>
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<box hibit="17" settings="1">
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<c>(1)</c>
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</box>
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<box hibit="16" settings="1">
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<c>(1)</c>
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</box>
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<box hibit="15" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="13" settings="1">
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<c>(0)</c>
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</box>
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<box hibit="12" settings="1">
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<c>0</c>
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</box>
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<box hibit="11" settings="1">
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<c>(0)</c>
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</box>
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<box hibit="10" width="3" settings="3">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="7" width="4" name="hint" settings="4">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="3" width="4" name="option" settings="4">
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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</regdiagram>
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<encoding name="WFE_T2" oneofinclass="1" oneof="3" label="T2">
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<docvars>
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<docvar key="armarmheading" value="T2" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="WFE" />
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</docvars>
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<asmtemplate><text>WFE</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>.W</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/WFE/T2_A.txt" mylink="aarch32.instrs.WFE.T2_A.txt" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">// No additional decoding required</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="WFE_A1, WFE_T1, WFE_T2" symboldefcount="1">
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<symbol link="sa_c"><c></symbol>
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<account encodedin="">
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<intro>
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<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="WFE_A1, WFE_T1" symboldefcount="1">
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<symbol link="sa_q"><q></symbol>
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<account encodedin="">
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<intro>
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<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/WFE/Op_A.txt" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute">if <a link="impl-aarch32.ConditionPassed.0" file="shared_pseudocode.xml" hover="function: boolean ConditionPassed()">ConditionPassed</a>() then
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EncodingSpecificOperations();
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if <a link="impl-shared.IsEventRegisterSet.0" file="shared_pseudocode.xml" hover="function: boolean IsEventRegisterSet()">IsEventRegisterSet</a>() then
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<a link="impl-shared.ClearEventRegister.0" file="shared_pseudocode.xml" hover="function: ClearEventRegister()">ClearEventRegister</a>();
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else
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if PSTATE.EL == <a link="EL0" file="shared_pseudocode.xml" hover="constant bits(2) EL0 = '00'">EL0</a> then
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// Check for traps described by the OS.
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<a link="AArch32.CheckForWFxTrap.2" file="shared_pseudocode.xml" hover="function: AArch32.CheckForWFxTrap(bits(2) target_el, WFxType wfxtype)">AArch32.CheckForWFxTrap</a>(<a link="EL1" file="shared_pseudocode.xml" hover="constant bits(2) EL1 = '01'">EL1</a>, <a link="WFxType_WFE" file="shared_pseudocode.xml" hover="enumeration WFxType {WFxType_WFE, WFxType_WFI, WFxType_WFET, WFxType_WFIT}">WFxType_WFE</a>);
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if PSTATE.EL IN {<a link="EL0" file="shared_pseudocode.xml" hover="constant bits(2) EL0 = '00'">EL0</a>, <a link="EL1" file="shared_pseudocode.xml" hover="constant bits(2) EL1 = '01'">EL1</a>} && <a link="impl-shared.EL2Enabled.0" file="shared_pseudocode.xml" hover="function: boolean EL2Enabled()">EL2Enabled</a>() && !<a link="impl-shared.IsInHost.0" file="shared_pseudocode.xml" hover="function: boolean IsInHost()">IsInHost</a>() then
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// Check for traps described by the Hypervisor.
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<a link="AArch32.CheckForWFxTrap.2" file="shared_pseudocode.xml" hover="function: AArch32.CheckForWFxTrap(bits(2) target_el, WFxType wfxtype)">AArch32.CheckForWFxTrap</a>(<a link="EL2" file="shared_pseudocode.xml" hover="constant bits(2) EL2 = '10'">EL2</a>, <a link="WFxType_WFE" file="shared_pseudocode.xml" hover="enumeration WFxType {WFxType_WFE, WFxType_WFI, WFxType_WFET, WFxType_WFIT}">WFxType_WFE</a>);
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if <a link="impl-shared.HaveEL.1" file="shared_pseudocode.xml" hover="function: boolean HaveEL(bits(2) el)">HaveEL</a>(<a link="EL3" file="shared_pseudocode.xml" hover="constant bits(2) EL3 = '11'">EL3</a>) && PSTATE.M != <a link="M32_Monitor" file="shared_pseudocode.xml" hover="constant bits(5) M32_Monitor = '10110'">M32_Monitor</a> then
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// Check for traps described by the Secure Monitor.
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<a link="AArch32.CheckForWFxTrap.2" file="shared_pseudocode.xml" hover="function: AArch32.CheckForWFxTrap(bits(2) target_el, WFxType wfxtype)">AArch32.CheckForWFxTrap</a>(<a link="EL3" file="shared_pseudocode.xml" hover="constant bits(2) EL3 = '11'">EL3</a>, <a link="WFxType_WFE" file="shared_pseudocode.xml" hover="enumeration WFxType {WFxType_WFE, WFxType_WFI, WFxType_WFET, WFxType_WFIT}">WFxType_WFE</a>);
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integer localtimeout = 1 << 64; // No local timeout event is generated
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<a link="impl-shared.WaitForEvent.1" file="shared_pseudocode.xml" hover="function: WaitForEvent(integer localtimeout)">WaitForEvent</a>(localtimeout);</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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