272 lines
12 KiB
XML
272 lines
12 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
|
|
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
|
|
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
|
|
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
|
|
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
|
|
|
|
<instructionsection id="UDF" title="UDF -- AArch32" type="instruction">
|
|
<docvars>
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="mnemonic" value="UDF" />
|
|
</docvars>
|
|
<heading>UDF</heading>
|
|
<desc>
|
|
<brief>
|
|
<para>Permanently Undefined</para>
|
|
</brief>
|
|
<authored>
|
|
<para>Permanently Undefined generates an Undefined Instruction exception.</para>
|
|
<para>The encodings for <instruction>UDF</instruction> used in this section are defined as permanently <arm-defined-word>undefined</arm-defined-word>. However:</para>
|
|
<list type="unordered">
|
|
<listitem><content>With the T32 instruction set, Arm deprecates using the <instruction>UDF</instruction> instruction in an IT block.</content></listitem>
|
|
<listitem><content>In the A32 instruction set, <instruction>UDF</instruction> is not conditional.</content></listitem>
|
|
</list>
|
|
</authored>
|
|
</desc>
|
|
<alias_list howmany="0"></alias_list>
|
|
<classes>
|
|
<classesintro count="3">
|
|
<txt>It has encodings from the following instruction sets:</txt>
|
|
<txt> A32 (</txt>
|
|
<a href="#iclass_a1">A1</a>
|
|
<txt>)</txt>
|
|
<txt> and </txt>
|
|
<txt> T32 (</txt>
|
|
<a href="#iclass_t1">T1</a>
|
|
<txt> and </txt>
|
|
<a href="#iclass_t2">T2</a>
|
|
<txt>)</txt>
|
|
<txt>.</txt>
|
|
</classesintro>
|
|
<iclass name="A1" oneof="3" id="iclass_a1" no_encodings="1" isa="A32">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="A1" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="A32" />
|
|
<docvar key="mnemonic" value="UDF" />
|
|
</docvars>
|
|
<iclassintro count="1"></iclassintro>
|
|
<regdiagram form="32" psname="aarch32/instrs/UDF/A1_A.txt" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="27" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<encoding name="UDF_A1" oneofinclass="1" oneof="3" label="A1">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="A1" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="A32" />
|
|
<docvar key="mnemonic" value="UDF" />
|
|
</docvars>
|
|
<asmtemplate><text>UDF</text><text>{</text><a link="sa_c_1" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a>{#}</a><a link="sa_imm_2" hover="16-bit unsigned immediate [0-65535] (field "imm12:imm4")"><imm></a></asmtemplate>
|
|
</encoding>
|
|
<ps_section howmany="1">
|
|
<ps name="aarch32/instrs/UDF/A1_A.txt" mylink="aarch32.instrs.UDF.A1_A.txt" enclabels="" sections="1" secttype="noheading">
|
|
<pstext mayhavelinks="1" section="Decode" rep_section="decode">imm32 = <a link="impl-shared.ZeroExtend.2" file="shared_pseudocode.xml" hover="function: bits(N) ZeroExtend(bits(M) x, integer N)">ZeroExtend</a>(imm12:imm4, 32);
|
|
// imm32 is for assembly and disassembly only, and is ignored by hardware.</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</iclass>
|
|
<iclass name="T1" oneof="3" id="iclass_t1" no_encodings="1" isa="T32">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T1" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="T32" />
|
|
<docvar key="mnemonic" value="UDF" />
|
|
</docvars>
|
|
<iclassintro count="1"></iclassintro>
|
|
<regdiagram form="16" psname="aarch32/instrs/UDF/T1_A.txt">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" name="S" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<encoding name="UDF_T1" oneofinclass="1" oneof="3" label="T1">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T1" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="T32" />
|
|
<docvar key="mnemonic" value="UDF" />
|
|
</docvars>
|
|
<asmtemplate><text>UDF</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a>{#}</a><a link="sa_imm" hover="8-bit unsigned immediate [0-255] (field "imm8")"><imm></a></asmtemplate>
|
|
</encoding>
|
|
<ps_section howmany="1">
|
|
<ps name="aarch32/instrs/UDF/T1_A.txt" mylink="aarch32.instrs.UDF.T1_A.txt" enclabels="" sections="1" secttype="noheading">
|
|
<pstext mayhavelinks="1" section="Decode" rep_section="decode">imm32 = <a link="impl-shared.ZeroExtend.2" file="shared_pseudocode.xml" hover="function: bits(N) ZeroExtend(bits(M) x, integer N)">ZeroExtend</a>(imm8, 32);
|
|
// imm32 is for assembly and disassembly only, and is ignored by hardware.</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</iclass>
|
|
<iclass name="T2" oneof="3" id="iclass_t2" no_encodings="1" isa="T32">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T2" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="T32" />
|
|
<docvar key="mnemonic" value="UDF" />
|
|
</docvars>
|
|
<iclassintro count="1"></iclassintro>
|
|
<regdiagram form="16x2" psname="aarch32/instrs/UDF/T2_A.txt">
|
|
<box hibit="31" width="11" settings="11">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" name="o1" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="13" name="o2" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<encoding name="UDF_T2" oneofinclass="1" oneof="3" label="T2">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T2" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="T32" />
|
|
<docvar key="mnemonic" value="UDF" />
|
|
</docvars>
|
|
<asmtemplate comment="<imm> can be represented in T1"><text>UDF</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>.W </text><a>{#}</a><a link="sa_imm_1" hover="16-bit unsigned immediate [0-65535] (field "imm4:imm12")"><imm></a></asmtemplate>
|
|
<asmtemplate><text>UDF</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a>{#}</a><a link="sa_imm_1" hover="16-bit unsigned immediate [0-65535] (field "imm4:imm12")"><imm></a></asmtemplate>
|
|
</encoding>
|
|
<ps_section howmany="1">
|
|
<ps name="aarch32/instrs/UDF/T2_A.txt" mylink="aarch32.instrs.UDF.T2_A.txt" enclabels="" sections="1" secttype="noheading">
|
|
<pstext mayhavelinks="1" section="Decode" rep_section="decode">imm32 = <a link="impl-shared.ZeroExtend.2" file="shared_pseudocode.xml" hover="function: bits(N) ZeroExtend(bits(M) x, integer N)">ZeroExtend</a>(imm4:imm12, 32);
|
|
// imm32 is for assembly and disassembly only, and is ignored by hardware.</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</iclass>
|
|
</classes>
|
|
<explanations scope="all">
|
|
<explanation enclist="UDF_A1" symboldefcount="1">
|
|
<symbol link="sa_c_1"><c></symbol>
|
|
<account encodedin="">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="A1" />
|
|
<docvar key="isa" value="A32" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For encoding A1: see <xref linkend="Babbefhf">Standard assembler syntax fields</xref>. <syntax><c></syntax> must be <value>AL</value> or omitted.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="UDF_T1, UDF_T2" symboldefcount="2">
|
|
<symbol link="sa_c"><c></symbol>
|
|
<account encodedin="">
|
|
<docvars>
|
|
<docvar key="isa" value="T32" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For encoding T1 and T2: see <xref linkend="Babbefhf">Standard assembler syntax fields</xref>. Arm deprecates using any <syntax><c></syntax> value other than <value>AL</value>.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="UDF_A1, UDF_T1, UDF_T2" symboldefcount="1">
|
|
<symbol link="sa_q"><q></symbol>
|
|
<account encodedin="">
|
|
<intro>
|
|
<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="UDF_A1" symboldefcount="1">
|
|
<symbol link="sa_imm_2"><imm></symbol>
|
|
<account encodedin="imm12:imm4">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="A1" />
|
|
<docvar key="isa" value="A32" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For encoding A1: is a 16-bit unsigned immediate, in the range 0 to 65535, encoded in the "imm12:imm4" field. The PE ignores the value of this constant.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="UDF_T1" symboldefcount="2">
|
|
<symbol link="sa_imm"><imm></symbol>
|
|
<account encodedin="imm8">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T1" />
|
|
<docvar key="isa" value="T32" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For encoding T1: is a 8-bit unsigned immediate, in the range 0 to 255, encoded in the "imm8" field. The PE ignores the value of this constant.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="UDF_T2" symboldefcount="3">
|
|
<symbol link="sa_imm_1"><imm></symbol>
|
|
<account encodedin="imm4:imm12">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T2" />
|
|
<docvar key="isa" value="T32" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For encoding T2: is a 16-bit unsigned immediate, in the range 0 to 65535, encoded in the "imm4:imm12" field. The PE ignores the value of this constant.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
</explanations>
|
|
<ps_section howmany="1">
|
|
<ps name="aarch32/instrs/UDF/Op_A.txt" mylink="execute" enclabels="" sections="1" secttype="Operation">
|
|
<pstext mayhavelinks="1" section="Execute" rep_section="execute">if <a link="impl-aarch32.ConditionPassed.0" file="shared_pseudocode.xml" hover="function: boolean ConditionPassed()">ConditionPassed</a>() then
|
|
EncodingSpecificOperations();
|
|
UNDEFINED;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</instructionsection>
|