312 lines
16 KiB
XML
312 lines
16 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
|
|
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
|
|
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
|
|
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
|
|
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
|
|
|
|
<instructionsection id="SXTH" title="SXTH -- AArch32" type="instruction">
|
|
<docvars>
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="mnemonic" value="SXTH" />
|
|
</docvars>
|
|
<heading>SXTH</heading>
|
|
<desc>
|
|
<brief>
|
|
<para>Signed Extend Halfword</para>
|
|
</brief>
|
|
<authored>
|
|
<para>Signed Extend Halfword extracts a 16-bit value from a register, sign-extends it to 32 bits, and writes the result to the destination register. The instruction can specify a rotation by 0, 8, 16, or 24 bits before extracting the 16-bit value.</para>
|
|
</authored>
|
|
<encodingnotes>
|
|
<para>For more information about the <arm-defined-word>constrained unpredictable</arm-defined-word> behavior of this instruction, see <xref linkend="CJAEGDJC">Architectural Constraints on UNPREDICTABLE behaviors</xref>.</para>
|
|
</encodingnotes>
|
|
</desc>
|
|
<operationalnotes>
|
|
<para>If CPSR.DIT is 1, this instruction has passed its condition execution check, and does not use R15 as either its source or destination:</para>
|
|
<list type="unordered">
|
|
<listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
|
|
<listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
|
|
</list>
|
|
</operationalnotes>
|
|
<alias_list howmany="0"></alias_list>
|
|
<classes>
|
|
<classesintro count="3">
|
|
<txt>It has encodings from the following instruction sets:</txt>
|
|
<txt> A32 (</txt>
|
|
<a href="#iclass_a1">A1</a>
|
|
<txt>)</txt>
|
|
<txt> and </txt>
|
|
<txt> T32 (</txt>
|
|
<a href="#iclass_t1">T1</a>
|
|
<txt> and </txt>
|
|
<a href="#iclass_t2">T2</a>
|
|
<txt>)</txt>
|
|
<txt>.</txt>
|
|
</classesintro>
|
|
<iclass name="A1" oneof="3" id="iclass_a1" no_encodings="1" isa="A32">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="A1" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="A32" />
|
|
<docvar key="mnemonic" value="SXTH" />
|
|
</docvars>
|
|
<iclassintro count="1"></iclassintro>
|
|
<regdiagram form="32" psname="aarch32/instrs/SXTH/A1_A.txt" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="U" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" name="rotate" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<encoding name="SXTH_A1" oneofinclass="1" oneof="3" label="A1">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="A1" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="A32" />
|
|
<docvar key="mnemonic" value="SXTH" />
|
|
</docvars>
|
|
<asmtemplate><text>SXTH</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><text>{</text><a link="sa_rd" hover="General-purpose destination register (field "Rd")"><Rd></a><text>,</text><text>}</text><text> </text><a link="sa_rm" hover="General-purpose source register (field "Rm")"><Rm></a><text> </text><text>{</text><text>, ROR #</text><a link="sa_amount" hover="Rotate amount (field "rotate")"><amount></a><text>}</text></asmtemplate>
|
|
</encoding>
|
|
<ps_section howmany="1">
|
|
<ps name="aarch32/instrs/SXTH/A1_A.txt" mylink="aarch32.instrs.SXTH.A1_A.txt" enclabels="" sections="1" secttype="noheading">
|
|
<pstext mayhavelinks="1" section="Decode" rep_section="decode">d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd); m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm); rotation = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(rotate:'000');
|
|
if d == 15 || m == 15 then UNPREDICTABLE;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</iclass>
|
|
<iclass name="T1" oneof="3" id="iclass_t1" no_encodings="1" isa="T32">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T1" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="T32" />
|
|
<docvar key="mnemonic" value="SXTH" />
|
|
</docvars>
|
|
<iclassintro count="1"></iclassintro>
|
|
<regdiagram form="16" psname="aarch32/instrs/SXTH/T1_A.txt">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="U" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="B" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="21" width="3" name="Rm" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="Rd" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<encoding name="SXTH_T1" oneofinclass="1" oneof="3" label="T1">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T1" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="T32" />
|
|
<docvar key="mnemonic" value="SXTH" />
|
|
</docvars>
|
|
<asmtemplate><text>SXTH</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><text>{</text><a link="sa_rd" hover="General-purpose destination register (field "Rd")"><Rd></a><text>,</text><text>}</text><text> </text><a link="sa_rm" hover="General-purpose source register (field "Rm")"><Rm></a></asmtemplate>
|
|
</encoding>
|
|
<ps_section howmany="1">
|
|
<ps name="aarch32/instrs/SXTH/T1_A.txt" mylink="aarch32.instrs.SXTH.T1_A.txt" enclabels="" sections="1" secttype="noheading">
|
|
<pstext mayhavelinks="1" section="Decode" rep_section="decode">d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd); m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm); rotation = 0;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</iclass>
|
|
<iclass name="T2" oneof="3" id="iclass_t2" no_encodings="1" isa="T32">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T2" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="T32" />
|
|
<docvar key="mnemonic" value="SXTH" />
|
|
</docvars>
|
|
<iclassintro count="1"></iclassintro>
|
|
<regdiagram form="16x2" psname="aarch32/instrs/SXTH/T2_A.txt">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="op1" settings="2">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="U" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="15" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" width="2" name="rotate" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<encoding name="SXTH_T2" oneofinclass="1" oneof="3" label="T2">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T2" />
|
|
<docvar key="instr-class" value="general" />
|
|
<docvar key="isa" value="T32" />
|
|
<docvar key="mnemonic" value="SXTH" />
|
|
</docvars>
|
|
<asmtemplate comment="<Rd>, <Rm> can be represented in T1"><text>SXTH</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>.W </text><text>{</text><a link="sa_rd" hover="General-purpose destination register (field "Rd")"><Rd></a><text>,</text><text>}</text><text> </text><a link="sa_rm" hover="General-purpose source register (field "Rm")"><Rm></a></asmtemplate>
|
|
<asmtemplate><text>SXTH</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><text>{</text><a link="sa_rd" hover="General-purpose destination register (field "Rd")"><Rd></a><text>,</text><text>}</text><text> </text><a link="sa_rm" hover="General-purpose source register (field "Rm")"><Rm></a><text> </text><text>{</text><text>, ROR #</text><a link="sa_amount" hover="Rotate amount (field "rotate")"><amount></a><text>}</text></asmtemplate>
|
|
</encoding>
|
|
<ps_section howmany="1">
|
|
<ps name="aarch32/instrs/SXTH/T2_A.txt" mylink="aarch32.instrs.SXTH.T2_A.txt" enclabels="" sections="1" secttype="noheading">
|
|
<pstext mayhavelinks="1" section="Decode" rep_section="decode">d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd); m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm); rotation = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(rotate:'000');
|
|
if d == 15 || m == 15 then UNPREDICTABLE; // Armv8-A removes UNPREDICTABLE for R13</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</iclass>
|
|
</classes>
|
|
<explanations scope="all">
|
|
<explanation enclist="SXTH_A1, SXTH_T1, SXTH_T2" symboldefcount="1">
|
|
<symbol link="sa_c"><c></symbol>
|
|
<account encodedin="">
|
|
<intro>
|
|
<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SXTH_A1, SXTH_T1, SXTH_T2" symboldefcount="1">
|
|
<symbol link="sa_q"><q></symbol>
|
|
<account encodedin="">
|
|
<intro>
|
|
<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SXTH_A1, SXTH_T1, SXTH_T2" symboldefcount="1">
|
|
<symbol link="sa_rd"><Rd></symbol>
|
|
<account encodedin="Rd">
|
|
<intro>
|
|
<para>Is the general-purpose destination register, encoded in the "Rd" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SXTH_A1, SXTH_T1, SXTH_T2" symboldefcount="1">
|
|
<symbol link="sa_rm"><Rm></symbol>
|
|
<account encodedin="Rm">
|
|
<intro>
|
|
<para>Is the general-purpose source register, encoded in the "Rm" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SXTH_A1, SXTH_T2" symboldefcount="1">
|
|
<symbol link="sa_amount"><amount></symbol>
|
|
<definition encodedin="rotate">
|
|
<intro>Is the rotate amount, </intro>
|
|
<table class="valuetable">
|
|
<tgroup cols="2">
|
|
<thead>
|
|
<row>
|
|
<entry class="bitfield">rotate</entry>
|
|
<entry class="symbol"><amount></entry>
|
|
</row>
|
|
</thead>
|
|
<tbody>
|
|
<row>
|
|
<entry class="bitfield">00</entry>
|
|
<entry class="symbol">(omitted)</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">01</entry>
|
|
<entry class="symbol">8</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">10</entry>
|
|
<entry class="symbol">16</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">11</entry>
|
|
<entry class="symbol">24</entry>
|
|
</row>
|
|
</tbody>
|
|
</tgroup>
|
|
</table>
|
|
</definition>
|
|
</explanation>
|
|
</explanations>
|
|
<ps_section howmany="1">
|
|
<ps name="aarch32/instrs/SXTH/Op_A.txt" mylink="execute" enclabels="" sections="1" secttype="Operation">
|
|
<pstext mayhavelinks="1" section="Execute" rep_section="execute">if <a link="impl-aarch32.ConditionPassed.0" file="shared_pseudocode.xml" hover="function: boolean ConditionPassed()">ConditionPassed</a>() then
|
|
EncodingSpecificOperations();
|
|
rotated = <a link="impl-shared.ROR.2" file="shared_pseudocode.xml" hover="function: bits(N) ROR(bits(N) x, integer shift)">ROR</a>(<a link="impl-aarch32.R.read.1" file="shared_pseudocode.xml" hover="accessor: bits(32) R[integer n]">R</a>[m], rotation);
|
|
<a link="impl-aarch32.R.write.1" file="shared_pseudocode.xml" hover="accessor: R[integer n] = bits(32) value">R</a>[d] = <a link="impl-shared.SignExtend.2" file="shared_pseudocode.xml" hover="function: bits(N) SignExtend(bits(M) x, integer N)">SignExtend</a>(rotated<15:0>, 32);</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</instructionsection>
|