328 lines
18 KiB
XML
328 lines
18 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="SSAT" title="SSAT -- AArch32" type="instruction">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="mnemonic" value="SSAT" />
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</docvars>
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<heading>SSAT</heading>
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<desc>
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<brief>
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<para>Signed Saturate</para>
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</brief>
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<authored>
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<para>Signed Saturate saturates an optionally-shifted signed value to a selectable signed range.</para>
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<para>This instruction sets <xref linkend="BEIDIGBH">PSTATE</xref>.Q to 1 if the operation saturates.</para>
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</authored>
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<encodingnotes>
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<para>For more information about the <arm-defined-word>constrained unpredictable</arm-defined-word> behavior of this instruction, see <xref linkend="CJAEGDJC">Architectural Constraints on UNPREDICTABLE behaviors</xref>.</para>
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</encodingnotes>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<classesintro count="2">
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<txt>It has encodings from the following instruction sets:</txt>
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<txt> A32 (</txt>
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<a href="#iclass_a1">A1</a>
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<txt>)</txt>
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<txt> and </txt>
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<txt> T32 (</txt>
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<a href="#iclass_t1">T1</a>
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<txt>)</txt>
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<txt>.</txt>
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</classesintro>
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<iclass name="A1" oneof="2" id="iclass_a1" no_encodings="2" isa="A32">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic" value="SSAT" />
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</docvars>
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<iclassintro count="2"></iclassintro>
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<regdiagram form="32" psname="aarch32/instrs/SSAT/A1_A.txt" tworows="1">
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<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
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<c colspan="4">!= 1111</c>
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</box>
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<box hibit="27" width="5" settings="5">
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="22" name="U" settings="1">
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<c>0</c>
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</box>
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<box hibit="21" settings="1">
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<c>1</c>
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</box>
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<box hibit="20" width="5" name="sat_imm" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" width="4" name="Rd" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="11" width="5" name="imm5" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="6" name="sh" usename="1">
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<c></c>
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</box>
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<box hibit="5" width="2" settings="2">
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="3" width="4" name="Rn" usename="1">
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<c colspan="4"></c>
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</box>
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</regdiagram>
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<encoding name="SSAT_A1_ASR" oneofinclass="2" oneof="4" label="Arithmetic shift right" bitdiffs="sh == 1">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic" value="SSAT" />
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<docvar key="mnemonic-shift-type" value="SSAT-asr" />
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<docvar key="shift-type" value="asr" />
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</docvars>
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<box hibit="6" width="1" name="sh">
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<c>1</c>
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</box>
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<asmtemplate><text>SSAT</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rd" hover="General-purpose destination register (field "Rd")"><Rd></a><text>, #</text><a link="sa_imm" hover="Bit position for saturation [1-32] (field "sat_imm")"><imm></a><text>, </text><a link="sa_rn" hover="General-purpose source register (field "Rn")"><Rn></a><text>, ASR #</text><a link="sa_amount_3" hover="Shift amount [1-32 (field "imm5")"><amount></a></asmtemplate>
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</encoding>
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<encoding name="SSAT_A1_LSL" oneofinclass="2" oneof="4" label="Logical shift left" bitdiffs="sh == 0">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic" value="SSAT" />
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<docvar key="mnemonic-shift-type" value="SSAT-lsl" />
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<docvar key="shift-type" value="lsl" />
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</docvars>
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<box hibit="6" width="1" name="sh">
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<c>0</c>
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</box>
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<asmtemplate><text>SSAT</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rd" hover="General-purpose destination register (field "Rd")"><Rd></a><text>, #</text><a link="sa_imm" hover="Bit position for saturation [1-32] (field "sat_imm")"><imm></a><text>, </text><a link="sa_rn" hover="General-purpose source register (field "Rn")"><Rn></a><text> </text><text>{</text><text>, LSL #</text><a link="sa_amount_2" hover="Optional shift amount [0-31], default 0 (field "imm5")"><amount></a><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/SSAT/A1_A.txt" mylink="aarch32.instrs.SSAT.A1_A.txt" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd); n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn); saturate_to = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(sat_imm)+1;
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(shift_t, shift_n) = <a link="impl-aarch32.DecodeImmShift.2" file="shared_pseudocode.xml" hover="function: (SRType, integer) DecodeImmShift(bits(2) srtype, bits(5) imm5)">DecodeImmShift</a>(sh:'0', imm5);
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if d == 15 || n == 15 then UNPREDICTABLE;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="T1" oneof="2" id="iclass_t1" no_encodings="2" isa="T32">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="SSAT" />
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</docvars>
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<iclassintro count="2"></iclassintro>
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<regdiagram form="16x2" psname="aarch32/instrs/SSAT/T1_A.txt">
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<box hibit="31" width="5" settings="5">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="26" settings="1">
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<c>(0)</c>
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</box>
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<box hibit="25" width="2" settings="2">
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="23" width="2" settings="2">
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="21" name="sh" usename="1">
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<c></c>
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</box>
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<box hibit="20" settings="1">
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<c>0</c>
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</box>
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<box hibit="19" width="4" name="Rn" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" settings="1">
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<c>0</c>
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</box>
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<box hibit="14" width="3" name="imm3" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="11" width="4" name="Rd" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="7" width="2" name="imm2" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="5" settings="1">
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<c>(0)</c>
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</box>
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<box hibit="4" width="5" name="sat_imm" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="SSAT_T1_ASR" oneofinclass="2" oneof="4" label="Arithmetic shift right" bitdiffs="sh == 1 && !(imm3 == 000 && imm2 == 00)">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="SSAT" />
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<docvar key="mnemonic-shift-type" value="SSAT-asr" />
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<docvar key="shift-type" value="asr" />
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</docvars>
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<box hibit="21" width="1" name="sh">
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<c>1</c>
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</box>
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<box hibit="14" width="9" name="imm3:imm2">
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<c>Z</c>
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<c>Z</c>
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<c>Z</c>
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<c>Z</c>
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<c>Z</c>
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</box>
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<asmtemplate><text>SSAT</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rd" hover="General-purpose destination register (field "Rd")"><Rd></a><text>, #</text><a link="sa_imm" hover="Bit position for saturation [1-32] (field "sat_imm")"><imm></a><text>, </text><a link="sa_rn" hover="General-purpose source register (field "Rn")"><Rn></a><text>, ASR #</text><a link="sa_amount_1" hover="Shift amount [1-31 (field "imm3:imm2")"><amount></a></asmtemplate>
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</encoding>
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<encoding name="SSAT_T1_LSL" oneofinclass="2" oneof="4" label="Logical shift left" bitdiffs="sh == 0">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="SSAT" />
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<docvar key="mnemonic-shift-type" value="SSAT-lsl" />
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<docvar key="shift-type" value="lsl" />
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</docvars>
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<box hibit="21" width="1" name="sh">
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<c>0</c>
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</box>
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<asmtemplate><text>SSAT</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rd" hover="General-purpose destination register (field "Rd")"><Rd></a><text>, #</text><a link="sa_imm" hover="Bit position for saturation [1-32] (field "sat_imm")"><imm></a><text>, </text><a link="sa_rn" hover="General-purpose source register (field "Rn")"><Rn></a><text> </text><text>{</text><text>, LSL #</text><a link="sa_amount" hover="Optional shift amount [0-31], default 0 (field "imm3:imm2")"><amount></a><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/SSAT/T1_A.txt" mylink="aarch32.instrs.SSAT.T1_A.txt" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if sh == '1' && (imm3:imm2) == '00000' then SEE "SSAT16";
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d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd); n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn); saturate_to = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(sat_imm)+1;
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(shift_t, shift_n) = <a link="impl-aarch32.DecodeImmShift.2" file="shared_pseudocode.xml" hover="function: (SRType, integer) DecodeImmShift(bits(2) srtype, bits(5) imm5)">DecodeImmShift</a>(sh:'0', imm3:imm2);
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if d == 15 || n == 15 then UNPREDICTABLE; // Armv8-A removes UNPREDICTABLE for R13</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="SSAT_A1_LSL, SSAT_T1_LSL" symboldefcount="1">
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<symbol link="sa_c"><c></symbol>
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<account encodedin="">
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<intro>
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<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SSAT_A1_LSL, SSAT_T1_LSL" symboldefcount="1">
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<symbol link="sa_q"><q></symbol>
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<account encodedin="">
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<intro>
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<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SSAT_A1_LSL, SSAT_T1_LSL" symboldefcount="1">
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<symbol link="sa_rd"><Rd></symbol>
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<account encodedin="Rd">
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<intro>
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<para>Is the general-purpose destination register, encoded in the "Rd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SSAT_A1_LSL, SSAT_T1_LSL" symboldefcount="1">
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<symbol link="sa_imm"><imm></symbol>
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<account encodedin="sat_imm">
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<intro>
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<para>Is the bit position for saturation, in the range 1 to 32, encoded in the "sat_imm" field as <imm>-1.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SSAT_A1_LSL, SSAT_T1_LSL" symboldefcount="1">
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<symbol link="sa_rn"><Rn></symbol>
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<account encodedin="Rn">
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<intro>
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<para>Is the general-purpose source register, encoded in the "Rn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SSAT_A1_LSL" symboldefcount="1">
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<symbol link="sa_amount_2"><amount></symbol>
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<account encodedin="imm5">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic-shift-type" value="SSAT-lsl" />
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<docvar key="shift-type" value="lsl" />
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</docvars>
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<intro>
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<para>For encoding A1: is the optional shift amount, in the range 0 to 31, defaulting to 0 and encoded in the "imm5" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SSAT_A1_ASR" symboldefcount="2">
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<symbol link="sa_amount_3"><amount></symbol>
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<account encodedin="imm5">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic-shift-type" value="SSAT-asr" />
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<docvar key="shift-type" value="asr" />
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</docvars>
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<intro>
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<para>For encoding A1: is the shift amount, in the range 1 to 32 encoded in the "imm5" field as <amount> modulo 32.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SSAT_T1_LSL" symboldefcount="3">
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<symbol link="sa_amount"><amount></symbol>
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<account encodedin="imm3:imm2">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic-shift-type" value="SSAT-lsl" />
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<docvar key="shift-type" value="lsl" />
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</docvars>
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<intro>
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<para>For encoding T1: is the optional shift amount, in the range 0 to 31, defaulting to 0 and encoded in the "imm3:imm2" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SSAT_T1_ASR" symboldefcount="4">
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<symbol link="sa_amount_1"><amount></symbol>
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<account encodedin="imm3:imm2">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic-shift-type" value="SSAT-asr" />
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<docvar key="shift-type" value="asr" />
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</docvars>
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<intro>
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<para>For encoding T1: is the shift amount, in the range 1 to 31 encoded in the "imm3:imm2" field as <amount>.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/SSAT/Op_A.txt" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute">if <a link="impl-aarch32.ConditionPassed.0" file="shared_pseudocode.xml" hover="function: boolean ConditionPassed()">ConditionPassed</a>() then
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EncodingSpecificOperations();
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operand = <a link="impl-aarch32.Shift.4" file="shared_pseudocode.xml" hover="function: bits(N) Shift(bits(N) value, SRType srtype, integer amount, bit carry_in)">Shift</a>(<a link="impl-aarch32.R.read.1" file="shared_pseudocode.xml" hover="accessor: bits(32) R[integer n]">R</a>[n], shift_t, shift_n, PSTATE.C); // PSTATE.C ignored
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(result, sat) = <a link="impl-shared.SignedSatQ.2" file="shared_pseudocode.xml" hover="function: (bits(N), boolean) SignedSatQ(integer i, integer N)">SignedSatQ</a>(<a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(operand), saturate_to);
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<a link="impl-aarch32.R.write.1" file="shared_pseudocode.xml" hover="accessor: R[integer n] = bits(32) value">R</a>[d] = <a link="impl-shared.SignExtend.2" file="shared_pseudocode.xml" hover="function: bits(N) SignExtend(bits(M) x, integer N)">SignExtend</a>(result, 32);
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if sat then
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PSTATE.Q = '1';</pstext>
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</ps>
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</ps_section>
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|
</instructionsection>
|