394 lines
26 KiB
XML
394 lines
26 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="SMLALBB" title="SMLALBB, SMLALBT, SMLALTB, SMLALTT -- AArch32" type="instruction">
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<docvars>
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<docvar key="instr-class" value="general" />
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</docvars>
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<heading>SMLALBB, SMLALBT, SMLALTB, SMLALTT</heading>
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<desc>
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<brief>
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<para>Signed Multiply Accumulate Long (halfwords)</para>
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</brief>
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<authored>
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<para>Signed Multiply Accumulate Long (halfwords) multiplies two signed 16-bit values to produce a 32-bit value, and accumulates this with a 64-bit value. The multiply acts on two signed 16-bit quantities, taken from either the bottom or the top half of their respective source registers. The other halves of these source registers are ignored. The 32-bit product is sign-extended and accumulated with a 64-bit accumulate value.</para>
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<para>Overflow is possible during this instruction, but only as a result of the 64-bit addition. This overflow is not detected if it occurs. Instead, the result wraps around modulo 2<sup>64</sup>.</para>
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</authored>
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<encodingnotes>
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<para>For more information about the <arm-defined-word>constrained unpredictable</arm-defined-word> behavior of this instruction, see <xref linkend="CJAEGDJC">Architectural Constraints on UNPREDICTABLE behaviors</xref>.</para>
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</encodingnotes>
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</desc>
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<operationalnotes>
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<para>If CPSR.DIT is 1, this instruction has passed its condition execution check, and does not use R15 as either its source or destination:</para>
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<list type="unordered">
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<listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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<listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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</list>
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</operationalnotes>
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<alias_list howmany="0"></alias_list>
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<classes>
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<classesintro count="2">
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<txt>It has encodings from the following instruction sets:</txt>
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<txt> A32 (</txt>
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<a href="#iclass_a1">A1</a>
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<txt>)</txt>
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<txt> and </txt>
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<txt> T32 (</txt>
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<a href="#iclass_t1">T1</a>
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<txt>)</txt>
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<txt>.</txt>
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</classesintro>
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<iclass name="A1" oneof="2" id="iclass_a1" no_encodings="4" isa="A32">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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</docvars>
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<iclassintro count="4"></iclassintro>
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<regdiagram form="32" psname="aarch32/instrs/SMLALBB/A1_A.txt" tworows="1">
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<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
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<c colspan="4">!= 1111</c>
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</box>
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<box hibit="27" width="5" settings="5">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="22" width="2" name="opc" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="20" settings="1">
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<c>0</c>
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</box>
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<box hibit="19" width="4" name="RdHi" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" width="4" name="RdLo" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="11" width="4" name="Rm" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="7" settings="1">
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<c>1</c>
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</box>
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<box hibit="6" name="M" usename="1">
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<c></c>
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</box>
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<box hibit="5" name="N" usename="1">
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<c></c>
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</box>
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<box hibit="4" settings="1">
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<c>0</c>
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</box>
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<box hibit="3" width="4" name="Rn" usename="1">
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<c colspan="4"></c>
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</box>
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</regdiagram>
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<encoding name="SMLALBB_A1" oneofinclass="4" oneof="8" label="SMLALBB" bitdiffs="M == 0 && N == 0">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic" value="SMLALBB" />
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</docvars>
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<box hibit="6" width="1" name="M">
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<c>0</c>
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</box>
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<box hibit="5" width="1" name="N">
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<c>0</c>
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</box>
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<asmtemplate><text>SMLALBB</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rdlo" hover="General-purpose source register holding lower 32 bits of addend (field "RdLo")"><RdLo></a><text>, </text><a link="sa_rdhi" hover="General-purpose source register holding upper 32 bits of addend (field "RdHi")"><RdHi></a><text>, </text><a link="sa_rn_1" hover="First general-purpose source register holding multiplicand in the bottom or top half (selected by {syntax{<x>}}) (field "Rn")"><Rn></a><text>, </text><a link="sa_rm_1" hover="Second general-purpose source register holding multiplier in the bottom or top half (selected by {syntax{<y>}}) (field "Rm")"><Rm></a></asmtemplate>
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</encoding>
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<encoding name="SMLALBT_A1" oneofinclass="4" oneof="8" label="SMLALBT" bitdiffs="M == 1 && N == 0">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic" value="SMLALBT" />
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</docvars>
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<box hibit="6" width="1" name="M">
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<c>1</c>
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</box>
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<box hibit="5" width="1" name="N">
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<c>0</c>
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</box>
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<asmtemplate><text>SMLALBT</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rdlo" hover="General-purpose source register holding lower 32 bits of addend (field "RdLo")"><RdLo></a><text>, </text><a link="sa_rdhi" hover="General-purpose source register holding upper 32 bits of addend (field "RdHi")"><RdHi></a><text>, </text><a link="sa_rn_1" hover="First general-purpose source register holding multiplicand in the bottom or top half (selected by {syntax{<x>}}) (field "Rn")"><Rn></a><text>, </text><a link="sa_rm_1" hover="Second general-purpose source register holding multiplier in the bottom or top half (selected by {syntax{<y>}}) (field "Rm")"><Rm></a></asmtemplate>
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</encoding>
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<encoding name="SMLALTB_A1" oneofinclass="4" oneof="8" label="SMLALTB" bitdiffs="M == 0 && N == 1">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic" value="SMLALTB" />
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</docvars>
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<box hibit="6" width="1" name="M">
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<c>0</c>
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</box>
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<box hibit="5" width="1" name="N">
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<c>1</c>
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</box>
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<asmtemplate><text>SMLALTB</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rdlo" hover="General-purpose source register holding lower 32 bits of addend (field "RdLo")"><RdLo></a><text>, </text><a link="sa_rdhi" hover="General-purpose source register holding upper 32 bits of addend (field "RdHi")"><RdHi></a><text>, </text><a link="sa_rn_1" hover="First general-purpose source register holding multiplicand in the bottom or top half (selected by {syntax{<x>}}) (field "Rn")"><Rn></a><text>, </text><a link="sa_rm_1" hover="Second general-purpose source register holding multiplier in the bottom or top half (selected by {syntax{<y>}}) (field "Rm")"><Rm></a></asmtemplate>
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</encoding>
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<encoding name="SMLALTT_A1" oneofinclass="4" oneof="8" label="SMLALTT" bitdiffs="M == 1 && N == 1">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic" value="SMLALTT" />
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</docvars>
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<box hibit="6" width="1" name="M">
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<c>1</c>
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</box>
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<box hibit="5" width="1" name="N">
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<c>1</c>
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</box>
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<asmtemplate><text>SMLALTT</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rdlo" hover="General-purpose source register holding lower 32 bits of addend (field "RdLo")"><RdLo></a><text>, </text><a link="sa_rdhi" hover="General-purpose source register holding upper 32 bits of addend (field "RdHi")"><RdHi></a><text>, </text><a link="sa_rn_1" hover="First general-purpose source register holding multiplicand in the bottom or top half (selected by {syntax{<x>}}) (field "Rn")"><Rn></a><text>, </text><a link="sa_rm_1" hover="Second general-purpose source register holding multiplier in the bottom or top half (selected by {syntax{<y>}}) (field "Rm")"><Rm></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/SMLALBB/A1_A.txt" mylink="aarch32.instrs.SMLALBB.A1_A.txt" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">dLo = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(RdLo); dHi = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(RdHi); n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn); m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
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n_high = (N == '1'); m_high = (M == '1');
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if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
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if dHi == dLo then UNPREDICTABLE;</pstext>
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</ps>
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</ps_section>
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<constrained_unpredictables encoding="A1" ps_block="Decode">
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<cu_case>
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<cu_cause>
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<pstext mayhavelinks="1">dHi == dLo</pstext>
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</cu_cause>
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<cu_type constraint="Constraint_UNDEF" />
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<cu_type constraint="Constraint_NOP" />
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<cu_type constraint="Constraint_UNKNOWN" />
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</cu_case>
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</constrained_unpredictables>
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</iclass>
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<iclass name="T1" oneof="2" id="iclass_t1" no_encodings="4" isa="T32">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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</docvars>
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<iclassintro count="4"></iclassintro>
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<regdiagram form="16x2" psname="aarch32/instrs/SMLALBB/T1_A.txt">
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<box hibit="31" width="9" settings="9">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="22" width="3" name="op1" settings="3">
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="19" width="4" name="Rn" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" width="4" name="RdLo" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="11" width="4" name="RdHi" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="7" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="5" name="N" usename="1">
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<c></c>
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</box>
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<box hibit="4" name="M" usename="1">
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<c></c>
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</box>
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<box hibit="3" width="4" name="Rm" usename="1">
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<c colspan="4"></c>
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</box>
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</regdiagram>
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<encoding name="SMLALBB_T1" oneofinclass="4" oneof="8" label="SMLALBB" bitdiffs="N == 0 && M == 0">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="SMLALBB" />
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</docvars>
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<box hibit="5" width="1" name="N">
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<c>0</c>
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</box>
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<box hibit="4" width="1" name="M">
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<c>0</c>
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</box>
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<asmtemplate><text>SMLALBB</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rdlo" hover="General-purpose source register holding lower 32 bits of addend (field "RdLo")"><RdLo></a><text>, </text><a link="sa_rdhi" hover="General-purpose source register holding upper 32 bits of addend (field "RdHi")"><RdHi></a><text>, </text><a link="sa_rn" hover="First general-purpose source register holding multiplicand in the bottom or top half (selected by <x>) (field "Rn")"><Rn></a><text>, </text><a link="sa_rm" hover="Second general-purpose source register holding multiplier in the bottom or top half (selected by <x>) (field "Rm")"><Rm></a></asmtemplate>
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</encoding>
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<encoding name="SMLALBT_T1" oneofinclass="4" oneof="8" label="SMLALBT" bitdiffs="N == 0 && M == 1">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="SMLALBT" />
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</docvars>
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<box hibit="5" width="1" name="N">
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<c>0</c>
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</box>
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<box hibit="4" width="1" name="M">
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<c>1</c>
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</box>
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<asmtemplate><text>SMLALBT</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rdlo" hover="General-purpose source register holding lower 32 bits of addend (field "RdLo")"><RdLo></a><text>, </text><a link="sa_rdhi" hover="General-purpose source register holding upper 32 bits of addend (field "RdHi")"><RdHi></a><text>, </text><a link="sa_rn" hover="First general-purpose source register holding multiplicand in the bottom or top half (selected by <x>) (field "Rn")"><Rn></a><text>, </text><a link="sa_rm" hover="Second general-purpose source register holding multiplier in the bottom or top half (selected by <x>) (field "Rm")"><Rm></a></asmtemplate>
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</encoding>
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<encoding name="SMLALTB_T1" oneofinclass="4" oneof="8" label="SMLALTB" bitdiffs="N == 1 && M == 0">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="SMLALTB" />
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</docvars>
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<box hibit="5" width="1" name="N">
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<c>1</c>
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</box>
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<box hibit="4" width="1" name="M">
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<c>0</c>
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</box>
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<asmtemplate><text>SMLALTB</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rdlo" hover="General-purpose source register holding lower 32 bits of addend (field "RdLo")"><RdLo></a><text>, </text><a link="sa_rdhi" hover="General-purpose source register holding upper 32 bits of addend (field "RdHi")"><RdHi></a><text>, </text><a link="sa_rn" hover="First general-purpose source register holding multiplicand in the bottom or top half (selected by <x>) (field "Rn")"><Rn></a><text>, </text><a link="sa_rm" hover="Second general-purpose source register holding multiplier in the bottom or top half (selected by <x>) (field "Rm")"><Rm></a></asmtemplate>
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</encoding>
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<encoding name="SMLALTT_T1" oneofinclass="4" oneof="8" label="SMLALTT" bitdiffs="N == 1 && M == 1">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="SMLALTT" />
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</docvars>
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<box hibit="5" width="1" name="N">
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<c>1</c>
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</box>
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<box hibit="4" width="1" name="M">
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<c>1</c>
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</box>
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<asmtemplate><text>SMLALTT</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rdlo" hover="General-purpose source register holding lower 32 bits of addend (field "RdLo")"><RdLo></a><text>, </text><a link="sa_rdhi" hover="General-purpose source register holding upper 32 bits of addend (field "RdHi")"><RdHi></a><text>, </text><a link="sa_rn" hover="First general-purpose source register holding multiplicand in the bottom or top half (selected by <x>) (field "Rn")"><Rn></a><text>, </text><a link="sa_rm" hover="Second general-purpose source register holding multiplier in the bottom or top half (selected by <x>) (field "Rm")"><Rm></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/SMLALBB/T1_A.txt" mylink="aarch32.instrs.SMLALBB.T1_A.txt" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">dLo = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(RdLo); dHi = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(RdHi); n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn); m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
|
|
n_high = (N == '1'); m_high = (M == '1');
|
|
if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
|
|
// Armv8-A removes UNPREDICTABLE for R13
|
|
if dHi == dLo then UNPREDICTABLE;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
<constrained_unpredictables encoding="T1" ps_block="Decode">
|
|
<cu_case>
|
|
<cu_cause>
|
|
<pstext mayhavelinks="1">dHi == dLo</pstext>
|
|
</cu_cause>
|
|
<cu_type constraint="Constraint_UNDEF" />
|
|
<cu_type constraint="Constraint_NOP" />
|
|
<cu_type constraint="Constraint_UNKNOWN" />
|
|
</cu_case>
|
|
</constrained_unpredictables>
|
|
</iclass>
|
|
</classes>
|
|
<explanations scope="all">
|
|
<explanation enclist="SMLALBB_A1, SMLALBB_T1" symboldefcount="1">
|
|
<symbol link="sa_c"><c></symbol>
|
|
<account encodedin="">
|
|
<intro>
|
|
<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SMLALBB_A1, SMLALBB_T1" symboldefcount="1">
|
|
<symbol link="sa_q"><q></symbol>
|
|
<account encodedin="">
|
|
<intro>
|
|
<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SMLALBB_A1, SMLALBB_T1" symboldefcount="1">
|
|
<symbol link="sa_rdlo"><RdLo></symbol>
|
|
<account encodedin="RdLo">
|
|
<intro>
|
|
<para>Is the general-purpose source register holding the lower 32 bits of the addend, and the destination register for the lower 32 bits of the result, encoded in the "RdLo" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SMLALBB_A1, SMLALBB_T1" symboldefcount="1">
|
|
<symbol link="sa_rdhi"><RdHi></symbol>
|
|
<account encodedin="RdHi">
|
|
<intro>
|
|
<para>Is the general-purpose source register holding the upper 32 bits of the addend, and the destination register for the upper 32 bits of the result, encoded in the "RdHi" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SMLALBB_A1" symboldefcount="1">
|
|
<symbol link="sa_rn_1"><Rn></symbol>
|
|
<account encodedin="Rn">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="A1" />
|
|
<docvar key="isa" value="A32" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For encoding A1: is the first general-purpose source register holding the multiplicand in the bottom or top half (selected by <syntax><x></syntax>), encoded in the "Rn" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SMLALBB_T1" symboldefcount="2">
|
|
<symbol link="sa_rn"><Rn></symbol>
|
|
<account encodedin="Rn">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T1" />
|
|
<docvar key="isa" value="T32" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For encoding T1: is the first general-purpose source register holding the multiplicand in the bottom or top half (selected by <x>), encoded in the "Rn" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SMLALBB_A1" symboldefcount="1">
|
|
<symbol link="sa_rm_1"><Rm></symbol>
|
|
<account encodedin="Rm">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="A1" />
|
|
<docvar key="isa" value="A32" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For encoding A1: is the second general-purpose source register holding the multiplier in the bottom or top half (selected by <syntax><y></syntax>), encoded in the "Rm" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SMLALBB_T1" symboldefcount="2">
|
|
<symbol link="sa_rm"><Rm></symbol>
|
|
<account encodedin="Rm">
|
|
<docvars>
|
|
<docvar key="armarmheading" value="T1" />
|
|
<docvar key="isa" value="T32" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For encoding T1: is the second general-purpose source register holding the multiplier in the bottom or top half (selected by <x>), encoded in the "Rm" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
</explanations>
|
|
<ps_section howmany="1">
|
|
<ps name="aarch32/instrs/SMLALBB/Op_A.txt" mylink="execute" enclabels="" sections="1" secttype="Operation">
|
|
<pstext mayhavelinks="1" section="Execute" rep_section="execute">if <a link="impl-aarch32.ConditionPassed.0" file="shared_pseudocode.xml" hover="function: boolean ConditionPassed()">ConditionPassed</a>() then
|
|
EncodingSpecificOperations();
|
|
operand1 = if n_high then <a link="impl-aarch32.R.read.1" file="shared_pseudocode.xml" hover="accessor: bits(32) R[integer n]">R</a>[n]<31:16> else <a link="impl-aarch32.R.read.1" file="shared_pseudocode.xml" hover="accessor: bits(32) R[integer n]">R</a>[n]<15:0>;
|
|
operand2 = if m_high then <a link="impl-aarch32.R.read.1" file="shared_pseudocode.xml" hover="accessor: bits(32) R[integer n]">R</a>[m]<31:16> else <a link="impl-aarch32.R.read.1" file="shared_pseudocode.xml" hover="accessor: bits(32) R[integer n]">R</a>[m]<15:0>;
|
|
result = <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(operand1) * <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(operand2) + <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(<a link="impl-aarch32.R.read.1" file="shared_pseudocode.xml" hover="accessor: bits(32) R[integer n]">R</a>[dHi]:<a link="impl-aarch32.R.read.1" file="shared_pseudocode.xml" hover="accessor: bits(32) R[integer n]">R</a>[dLo]);
|
|
<a link="impl-aarch32.R.write.1" file="shared_pseudocode.xml" hover="accessor: R[integer n] = bits(32) value">R</a>[dHi] = result<63:32>;
|
|
<a link="impl-aarch32.R.write.1" file="shared_pseudocode.xml" hover="accessor: R[integer n] = bits(32) value">R</a>[dLo] = result<31:0>;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</instructionsection>
|