154 lines
11 KiB
XML
154 lines
11 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="DCPS1" title="DCPS1 -- AArch32" type="instruction">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="DCPS1" />
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</docvars>
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<heading>DCPS1</heading>
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<desc>
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<brief>
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<para>Debug Change PE State to EL1</para>
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</brief>
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<authored>
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<para>Debug Change PE State to EL1 allows the debugger to move the PE into EL1 from EL0 or to a specific mode at the current Exception level.</para>
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<para><instruction>DCPS1</instruction> is <arm-defined-word>undefined</arm-defined-word> if any of:</para>
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<list type="unordered">
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<listitem><content>The PE is in Non-debug state.</content></listitem>
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<listitem><content>EL2 is implemented, EL2 is implemented and enabled in the current Security state, and any of:<list type="unordered"><listitem><content>EL2 is using AArch32 and HCR.TGE is set to 1.</content></listitem><listitem><content>EL2 is using AArch64 and HCR_EL2.TGE is set to 1.</content></listitem></list></content></listitem>
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</list>
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<para>When the PE executes <instruction>DCPS1</instruction> at EL0, EL1 or EL3:</para>
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<list type="unordered">
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<listitem><content>If EL3 or EL1 is using AArch32, the PE enters SVC mode and LR_svc, SPSR_svc, DLR, and DSPSR become <arm-defined-word>UNKNOWN</arm-defined-word>. If <instruction>DCPS1</instruction> is executed in Monitor mode, SCR.NS is cleared to 0.</content></listitem>
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<listitem><content>If EL1 is using AArch64, the PE enters EL1 using AArch64, selects SP_EL1, and ELR_EL1, ESR_EL1, SPSR_EL1, DLR_EL0 and DSPSR_EL0 become <arm-defined-word>UNKNOWN</arm-defined-word>.</content></listitem>
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</list>
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<para>When the PE executes <instruction>DCPS1</instruction> at EL2 the PE does not change mode, and ELR_hyp, HSR, SPSR_hyp, DLR and DSPSR become <arm-defined-word>UNKNOWN</arm-defined-word>.</para>
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<para>For more information on the operation of the DCPS<n> instructions, see <xref linkend="dcps">DCPS</xref>.</para>
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</authored>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="T1" oneof="1" id="iclass_t1" no_encodings="1" isa="T32">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="DCPS1" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="16x2" psname="aarch32/instrs/DCPS1/T1_A.txt">
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<box hibit="31" width="12" settings="12">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="19" width="4" name="imm4" settings="4">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="15" width="4" settings="4">
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="11" width="10" name="imm10" settings="10">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="1" width="2" name="opt" settings="2">
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<c>0</c>
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<c>1</c>
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</box>
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</regdiagram>
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<encoding name="DCPS1_T1" oneofinclass="1" oneof="1" label="T1">
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<docvars>
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<docvar key="armarmheading" value="T1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="DCPS1" />
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</docvars>
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<asmtemplate><text>DCPS1</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/DCPS1/T1_A.txt" mylink="aarch32.instrs.DCPS1.T1_A.txt" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">// No additional decoding required.</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all"></explanations>
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<ps_section howmany="1">
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<ps name="aarch32/instrs/DCPS1/Op_A.txt" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute">if !<a link="impl-shared.Halted.0" file="shared_pseudocode.xml" hover="function: boolean Halted()">Halted</a>() then UNDEFINED;
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if <a link="impl-shared.EL2Enabled.0" file="shared_pseudocode.xml" hover="function: boolean EL2Enabled()">EL2Enabled</a>() && PSTATE.EL == <a link="EL0" file="shared_pseudocode.xml" hover="constant bits(2) EL0 = '00'">EL0</a> then
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tge = if <a link="impl-shared.ELUsingAArch32.1" file="shared_pseudocode.xml" hover="function: boolean ELUsingAArch32(bits(2) el)">ELUsingAArch32</a>(<a link="EL2" file="shared_pseudocode.xml" hover="constant bits(2) EL2 = '10'">EL2</a>) then HCR.TGE else HCR_EL2.TGE;
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if tge == '1' then UNDEFINED;
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if PSTATE.EL != <a link="EL0" file="shared_pseudocode.xml" hover="constant bits(2) EL0 = '00'">EL0</a> || <a link="impl-shared.ELUsingAArch32.1" file="shared_pseudocode.xml" hover="function: boolean ELUsingAArch32(bits(2) el)">ELUsingAArch32</a>(<a link="EL1" file="shared_pseudocode.xml" hover="constant bits(2) EL1 = '01'">EL1</a>) then
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if PSTATE.M == <a link="M32_Monitor" file="shared_pseudocode.xml" hover="constant bits(5) M32_Monitor = '10110'">M32_Monitor</a> then SCR.NS = '0';
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if PSTATE.EL != <a link="EL2" file="shared_pseudocode.xml" hover="constant bits(2) EL2 = '10'">EL2</a> then
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<a link="AArch32.WriteMode.1" file="shared_pseudocode.xml" hover="function: AArch32.WriteMode(bits(5) mode)">AArch32.WriteMode</a>(<a link="M32_Svc" file="shared_pseudocode.xml" hover="constant bits(5) M32_Svc = '10011'">M32_Svc</a>);
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PSTATE.E = SCTLR.EE;
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if <a link="impl-shared.HavePANExt.0" file="shared_pseudocode.xml" hover="function: boolean HavePANExt()">HavePANExt</a>() && SCTLR.SPAN == '0' then PSTATE.PAN = '1';
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LR_svc = bits(32) UNKNOWN;
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SPSR_svc = bits(32) UNKNOWN;
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else
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PSTATE.E = HSCTLR.EE;
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ELR_hyp = bits(32) UNKNOWN;
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HSR = bits(32) UNKNOWN;
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SPSR_hyp = bits(32) UNKNOWN;
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DLR = bits(32) UNKNOWN;
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DSPSR = bits(32) UNKNOWN;
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else // Targeting EL1 using AArch64
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<a link="AArch64.MaybeZeroRegisterUppers.0" file="shared_pseudocode.xml" hover="function: AArch64.MaybeZeroRegisterUppers()">AArch64.MaybeZeroRegisterUppers</a>();
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MaybeZeroSVEUppers(EL1);
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PSTATE.nRW = '0';
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PSTATE.SP = '1';
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PSTATE.EL = <a link="EL1" file="shared_pseudocode.xml" hover="constant bits(2) EL1 = '01'">EL1</a>;
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if <a link="impl-shared.HavePANExt.0" file="shared_pseudocode.xml" hover="function: boolean HavePANExt()">HavePANExt</a>() && SCTLR_EL1.SPAN == '0' then PSTATE.PAN = '1';
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if <a link="impl-shared.HaveUAOExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveUAOExt()">HaveUAOExt</a>() then PSTATE.UAO = '0';
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ELR_EL1 = bits(64) UNKNOWN;
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ESR_EL1 = bits(64) UNKNOWN;
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SPSR_EL1 = bits(64) UNKNOWN;
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DLR_EL0 = bits(64) UNKNOWN;
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DSPSR_EL0 = bits(64) UNKNOWN;
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// SCTLR_EL1.IESB might be ignored in Debug state.
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if (<a link="impl-shared.HaveIESB.0" file="shared_pseudocode.xml" hover="function: boolean HaveIESB()">HaveIESB</a>() && SCTLR_EL1.IESB == '1' &&
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!<a link="impl-shared.ConstrainUnpredictableBool.1" file="shared_pseudocode.xml" hover="function: boolean ConstrainUnpredictableBool(Unpredictable which)">ConstrainUnpredictableBool</a>(<a link="Unpredictable_IESBinDebug" file="shared_pseudocode.xml" hover="enumeration Unpredictable { Unpredictable_VMSR, Unpredictable_WBOVERLAPLD, Unpredictable_WBOVERLAPST, Unpredictable_LDPOVERLAP, Unpredictable_BASEOVERLAP, Unpredictable_DATAOVERLAP, Unpredictable_DEVPAGE2, Unpredictable_INSTRDEVICE, Unpredictable_RESCPACR, Unpredictable_RESMAIR, Unpredictable_S1CTAGGED, Unpredictable_S2RESMEMATTR, Unpredictable_RESTEXCB, Unpredictable_RESPRRR, Unpredictable_RESDACR, Unpredictable_RESVTCRS, Unpredictable_RESTnSZ, Unpredictable_RESTCF, Unpredictable_DEVICETAGSTORE, Unpredictable_OORTnSZ, Unpredictable_LARGEIPA, Unpredictable_ESRCONDPASS, Unpredictable_ILZEROIT, Unpredictable_ILZEROT, Unpredictable_BPVECTORCATCHPRI, Unpredictable_VCMATCHHALF, Unpredictable_VCMATCHDAPA, Unpredictable_WPMASKANDBAS, Unpredictable_WPBASCONTIGUOUS, Unpredictable_RESWPMASK, Unpredictable_WPMASKEDBITS, Unpredictable_RESBPWPCTRL, Unpredictable_BPNOTIMPL, Unpredictable_RESBPTYPE, Unpredictable_BPNOTCTXCMP, Unpredictable_BPMATCHHALF, Unpredictable_BPMISMATCHHALF, Unpredictable_RESTARTALIGNPC, Unpredictable_RESTARTZEROUPPERPC, Unpredictable_ZEROUPPER, Unpredictable_ERETZEROUPPERPC, Unpredictable_A32FORCEALIGNPC, Unpredictable_SMD, Unpredictable_NONFAULT, Unpredictable_SVEZEROUPPER, Unpredictable_SVELDNFDATA, Unpredictable_SVELDNFZERO, Unpredictable_CHECKSPNONEACTIVE, Unpredictable_SMEZEROUPPER, Unpredictable_NVNV1, Unpredictable_Shareability, Unpredictable_AFUPDATE, Unpredictable_DBUPDATE, Unpredictable_IESBinDebug, Unpredictable_BADPMSFCR, Unpredictable_ZEROBTYPE, Unpredictable_EL2TIMESTAMP, Unpredictable_EL1TIMESTAMP, Unpredictable_RESERVEDNSxB, Unpredictable_WFxTDEBUG, Unpredictable_LS64UNSUPPORTED, Unpredictable_MISALIGNEDATOMIC, Unpredictable_CLEARERRITEZERO, Unpredictable_ALUEXCEPTIONRETURN, Unpredictable_IGNORETRAPINDEBUG, Unpredictable_DBGxVR_RESS, Unpredictable_PMUEVENTCOUNTER, Unpredictable_PMSCR_PCT, Unpredictable_CounterReservedForEL2, Unpredictable_BRBFILTRATE, Unpredictable_MOPSOVERLAP31, Unpredictable_STOREONLYTAGCHECKEDCAS, Unpredictable_RESTC }">Unpredictable_IESBinDebug</a>)) then
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<a link="impl-shared.SynchronizeErrors.0" file="shared_pseudocode.xml" hover="function: SynchronizeErrors()">SynchronizeErrors</a>();
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<a link="impl-shared.UpdateEDSCRFields.0" file="shared_pseudocode.xml" hover="function: UpdateEDSCRFields()">UpdateEDSCRFields</a>(); // Update EDSCR PE state flags</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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