301 lines
16 KiB
XML
301 lines
16 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="ASRS_MOV_r" title="ASRS (immediate) -- AArch32" type="alias">
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<docvars>
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<docvar key="alias_mnemonic" value="ASRS" />
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<docvar key="instr-class" value="general" />
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</docvars>
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<heading>ASRS (immediate)</heading>
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<desc>
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<brief>
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<para>Arithmetic Shift Right, setting flags (immediate)</para>
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</brief>
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<authored>
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<para>Arithmetic Shift Right, setting flags (immediate) shifts a register value right by an immediate number of bits, shifting in copies of its sign bit, and writes the result to the destination register.</para>
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<para>If the destination register is not the PC, this instruction updates the condition flags based on the result.</para>
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<para>The field descriptions for <syntax><Rd></syntax> identify the encodings where the PC is permitted as the destination register. Arm deprecates any use of these encodings. However, when the destination register is the PC:</para>
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<list type="unordered">
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<listitem><content>The PE branches to the address written to the PC, and restores <xref linkend="BEIDIGBH">PSTATE</xref> from SPSR_<current_mode>.</content></listitem>
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<listitem><content>The PE checks SPSR_<current_mode> for an illegal return event. See <xref linkend="CHDDDJDB">Illegal return events from AArch32 state</xref>.</content></listitem>
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<listitem><content>The instruction is <arm-defined-word>undefined</arm-defined-word> in Hyp mode.</content></listitem>
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<listitem><content>The instruction is <arm-defined-word>constrained unpredictable</arm-defined-word> in User mode and System mode.</content></listitem>
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</list>
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</authored>
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</desc>
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<aliasto refiform="mov_r.xml" iformid="MOV_r">MOV, MOVS (register)</aliasto>
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<classes>
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<classesintro count="3">
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<txt>It has encodings from the following instruction sets:</txt>
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<txt> A32 (</txt>
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<a href="#iclass_a1">A1</a>
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<txt>)</txt>
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<txt> and </txt>
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<txt> T32 (</txt>
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<a href="#iclass_t2">T2</a>
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<txt> and </txt>
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<a href="#iclass_t3">T3</a>
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<txt>)</txt>
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<txt>.</txt>
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</classesintro>
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<iclass name="A1" oneof="3" id="iclass_a1" no_encodings="1" isa="A32">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="" tworows="1">
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<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
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<c colspan="4">!= 1111</c>
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</box>
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<box hibit="27" width="5" settings="5">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="22" width="2" name="opc" settings="2">
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="20" name="S" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="19" width="4" name="Rn" settings="4">
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<c>(0)</c>
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<c>(0)</c>
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<c>(0)</c>
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<c>(0)</c>
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</box>
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<box hibit="15" width="4" name="Rd" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="11" width="5" name="imm5" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="6" width="2" name="stype" usename="1" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="4" settings="1">
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<c>0</c>
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</box>
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<box hibit="3" width="4" name="Rm" usename="1">
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<c colspan="4"></c>
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</box>
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</regdiagram>
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<encoding name="ASRS_MOVS_r_A1" oneofinclass="1" oneof="3" label="MOVS, shift or rotate by value">
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<docvars>
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<docvar key="alias_mnemonic" value="ASRS" />
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<docvar key="armarmheading" value="A1" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A32" />
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<docvar key="mnemonic" value="MOVS" />
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<docvar key="mnemonic-shift-type" value="MOVS-shift-no-rrx" />
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<docvar key="shift-type" value="shift-no-rrx" />
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</docvars>
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<asmtemplate><text>ASRS</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><text>{</text><a link="sa_rd_4" hover="General-purpose destination register (field "Rd")"><Rd></a><text>,</text><text>}</text><text> </text><a link="sa_rm_2" hover="General-purpose source register (field "Rm")"><Rm></a><text>, #</text><a link="sa_imm_1" hover="Shift amount [1-32] (field "imm5")"><imm></a></asmtemplate>
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<equivalent_to>
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<asmtemplate><a href="mov_r.xml#MOVS_r_A1">MOVS</a><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rd_4" hover="General-purpose destination register (field "Rd")"><Rd></a><text>, </text><a link="sa_rm_2" hover="General-purpose source register (field "Rm")"><Rm></a><text>, ASR #</text><a link="sa_imm_1" hover="Shift amount [1-32] (field "imm5")"><imm></a></asmtemplate>
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<aliascond>Unconditionally</aliascond>
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</equivalent_to>
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</encoding>
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</iclass>
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<iclass name="T2" oneof="3" id="iclass_t2" no_encodings="1" isa="T32">
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<docvars>
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<docvar key="armarmheading" value="T2" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="MOV" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="16" psname="" tworows="1">
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<box hibit="31" width="3" settings="3">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="28" width="2" name="op" usename="1" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="26" width="5" name="imm5" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="21" width="3" name="Rm" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="18" width="3" name="Rd" usename="1">
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<c colspan="3"></c>
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</box>
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</regdiagram>
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<encoding name="ASRS_MOV_r_T2" oneofinclass="1" oneof="3" label="T2">
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<docvars>
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<docvar key="alias_mnemonic" value="ASRS" />
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<docvar key="armarmheading" value="T2" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="MOV" />
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</docvars>
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<asmtemplate comment="Outside IT block"><text>ASRS</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><text>{</text><a link="sa_rd_1" hover="General-purpose destination register (field "Rd")"><Rd></a><text>,</text><text>}</text><text> </text><a link="sa_rm_1" hover="General-purpose source register (field "Rm")"><Rm></a><text>, #</text><a link="sa_imm_1" hover="Shift amount [1-32] (field "imm5")"><imm></a></asmtemplate>
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<equivalent_to>
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<asmtemplate><a href="mov_r.xml#MOV_r_T2">MOVS</a><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rd_1" hover="General-purpose destination register (field "Rd")"><Rd></a><text>, </text><a link="sa_rm_1" hover="General-purpose source register (field "Rm")"><Rm></a><text>, ASR #</text><a link="sa_imm_1" hover="Shift amount [1-32] (field "imm5")"><imm></a></asmtemplate>
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<aliascond>!<a link="impl-aarch32.InITBlock.0" file="shared_pseudocode.xml" hover="function: boolean InITBlock()">InITBlock</a>()</aliascond>
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</equivalent_to>
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</encoding>
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</iclass>
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<iclass name="T3" oneof="3" id="iclass_t3" no_encodings="1" isa="T32">
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<docvars>
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<docvar key="armarmheading" value="T3" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="16x2" psname="" tworows="1">
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<box hibit="31" width="7" settings="7">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="24" width="4" name="op1" settings="4">
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="20" name="S" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="19" width="4" name="Rn" settings="4">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="15" settings="1">
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<c>(0)</c>
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</box>
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<box hibit="14" width="3" name="imm3" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="11" width="4" name="Rd" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="7" width="2" name="imm2" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="5" width="2" name="stype" usename="1" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="3" width="4" name="Rm" usename="1">
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<c colspan="4"></c>
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</box>
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</regdiagram>
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<encoding name="ASRS_MOVS_r_T3" oneofinclass="1" oneof="3" label="MOVS, shift or rotate by value">
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<docvars>
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<docvar key="alias_mnemonic" value="ASRS" />
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<docvar key="armarmheading" value="T3" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="T32" />
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<docvar key="mnemonic" value="MOVS" />
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<docvar key="mnemonic-shift-type" value="MOVS-shift-no-rrx" />
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<docvar key="shift-type" value="shift-no-rrx" />
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</docvars>
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<asmtemplate comment="Outside IT block, and <Rd>, <Rm>, <imm> can be represented in T2"><text>ASRS.W </text><text>{</text><a link="sa_rd_1" hover="General-purpose destination register (field "Rd")"><Rd></a><text>,</text><text>}</text><text> </text><a link="sa_rm_1" hover="General-purpose source register (field "Rm")"><Rm></a><text>, #</text><a link="sa_imm_2" hover="Shift amount [1-32] (field "imm3:imm2")"><imm></a></asmtemplate>
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<asmtemplate><text>ASRS</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><text>{</text><a link="sa_rd_1" hover="General-purpose destination register (field "Rd")"><Rd></a><text>,</text><text>}</text><text> </text><a link="sa_rm_1" hover="General-purpose source register (field "Rm")"><Rm></a><text>, #</text><a link="sa_imm_2" hover="Shift amount [1-32] (field "imm3:imm2")"><imm></a></asmtemplate>
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<equivalent_to>
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<asmtemplate><a href="mov_r.xml#MOVS_r_T3">MOVS</a><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><c></a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}"><q></a><text>}</text><text> </text><a link="sa_rd_1" hover="General-purpose destination register (field "Rd")"><Rd></a><text>, </text><a link="sa_rm_1" hover="General-purpose source register (field "Rm")"><Rm></a><text>, ASR #</text><a link="sa_imm_2" hover="Shift amount [1-32] (field "imm3:imm2")"><imm></a></asmtemplate>
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<aliascond>Unconditionally</aliascond>
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</equivalent_to>
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</encoding>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="ASRS_MOVS_r_A1, ASRS_MOVS_r_T3" symboldefcount="1">
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<symbol link="sa_c"><c></symbol>
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<account encodedin="">
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<intro>
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<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="ASRS_MOVS_r_A1, ASRS_MOV_r_T2, ASRS_MOVS_r_T3" symboldefcount="1">
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<symbol link="sa_q"><q></symbol>
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<account encodedin="">
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<intro>
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<para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="ASRS_MOVS_r_A1" symboldefcount="1">
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<symbol link="sa_rd_4"><Rd></symbol>
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<account encodedin="Rd">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="shift-type" value="shift-no-rrx" />
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</docvars>
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<intro>
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<para>For encoding A1: is the general-purpose destination register, encoded in the "Rd" field. Arm deprecates using the PC as the destination register, but if the PC is used, the instruction performs an exception return, that restores <xref linkend="BEIDIGBH">PSTATE</xref> from SPSR_<current_mode>.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="ASRS_MOV_r_T2, ASRS_MOVS_r_T3" symboldefcount="2">
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<symbol link="sa_rd_1"><Rd></symbol>
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<account encodedin="Rd">
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<intro>
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<para>For encoding T2 and T3: is the general-purpose destination register, encoded in the "Rd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="ASRS_MOVS_r_A1" symboldefcount="1">
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<symbol link="sa_rm_2"><Rm></symbol>
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<account encodedin="Rm">
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<docvars>
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<docvar key="armarmheading" value="A1" />
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<docvar key="shift-type" value="shift-no-rrx" />
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</docvars>
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<intro>
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<para>For encoding A1: is the general-purpose source register, encoded in the "Rm" field. The PC can be used, but this is deprecated.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="ASRS_MOV_r_T2, ASRS_MOVS_r_T3" symboldefcount="2">
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<symbol link="sa_rm_1"><Rm></symbol>
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<account encodedin="Rm">
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<intro>
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<para>For encoding T2 and T3: is the general-purpose source register, encoded in the "Rm" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="ASRS_MOVS_r_A1, ASRS_MOV_r_T2" symboldefcount="1">
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<symbol link="sa_imm_1"><imm></symbol>
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<account encodedin="imm5">
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<intro>
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<para>For encoding A1 and T2: is the shift amount, in the range 1 to 32, encoded in the "imm5" field as <imm> modulo 32.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="ASRS_MOVS_r_T3" symboldefcount="2">
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<symbol link="sa_imm_2"><imm></symbol>
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<account encodedin="imm3:imm2">
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<docvars>
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<docvar key="armarmheading" value="T3" />
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<docvar key="shift-type" value="shift-no-rrx" />
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</docvars>
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<intro>
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<para>For encoding T3: is the shift amount, in the range 1 to 32, encoded in the "imm3:imm2" field as <imm> modulo 32.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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</instructionsection>
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