21728 lines
846 KiB
XML
21728 lines
846 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="encodingindex-splitmaintable.xsl" version="1.0"?>
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<!DOCTYPE encodingindex PUBLIC "-//ARM//DTD encodingindex //EN" "encodingindex.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<encodingindex instructionset="A32">
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<hierarchy>
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<regdiagram form="32">
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<box hibit="31" width="4" name="cond" usename="1">
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<c colspan="4" />
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</box>
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<box hibit="27" width="3" name="op0" usename="1">
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<c colspan="3" />
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</box>
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<box hibit="24" width="20">
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<c colspan="20" />
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</box>
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<box hibit="4" width="1" name="op1" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="3" width="4">
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<c colspan="4" />
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</box>
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</regdiagram>
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<node groupname="dp">
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<header>Data-processing and miscellaneous instructions</header>
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<decode>
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<box hibit="31" width="4" name="cond" usename="1">
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<c colspan="4">!= 1111</c>
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</box>
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<box hibit="27" width="3" name="op0" usename="1">
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<c colspan="3">00x</c>
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</box>
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<box hibit="4" width="1" name="op1" usename="1">
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<c colspan="1" />
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</box>
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</decode>
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<regdiagram form="32">
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<box hibit="31" width="4">
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<c colspan="4">!= 1111</c>
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</box>
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<box hibit="27" width="2">
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<c colspan="2">00</c>
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</box>
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<box hibit="25" width="1" name="op0" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="24" width="5" name="op1" usename="1">
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<c colspan="5" />
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</box>
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<box hibit="19" width="12">
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<c colspan="12" />
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</box>
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<box hibit="7" width="1" name="op2" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="6" width="2" name="op3" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="4" width="1" name="op4" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="3" width="4">
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<c colspan="4" />
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</box>
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</regdiagram>
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<node groupname="xldst">
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<header>Extra load/store</header>
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<decode>
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<box hibit="25" width="1" name="op0" usename="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="24" width="5" name="op1" usename="1">
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<c colspan="5" />
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</box>
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<box hibit="7" width="1" name="op2" usename="1">
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<c colspan="1">1</c>
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</box>
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<box hibit="6" width="2" name="op3" usename="1">
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<c colspan="2">!= 00</c>
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</box>
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<box hibit="4" width="1" name="op4" usename="1">
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<c colspan="1">1</c>
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</box>
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</decode>
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<regdiagram form="32">
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<box hibit="31" width="4">
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<c colspan="4">!= 1111</c>
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</box>
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<box hibit="27" width="3">
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<c colspan="3">000</c>
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</box>
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<box hibit="24" width="2">
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<c colspan="2" />
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</box>
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<box hibit="22" width="1" name="op0" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="21" width="14">
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<c colspan="14" />
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</box>
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<box hibit="7" width="1">
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<c colspan="1">1</c>
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</box>
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<box hibit="6" width="2">
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<c colspan="2">!= 00</c>
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</box>
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<box hibit="4" width="1">
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<c colspan="1">1</c>
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</box>
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<box hibit="3" width="4">
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<c colspan="4" />
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</box>
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</regdiagram>
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<node iclass="ldstxreg">
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<header>Load/Store Dual, Half, Signed Byte (register)</header>
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<decode>
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<box hibit="22" width="1" name="op0" usename="1">
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<c colspan="1">0</c>
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</box>
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</decode>
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</node>
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<node iclass="ldstximm">
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<header>Load/Store Dual, Half, Signed Byte (immediate, literal)</header>
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<decode>
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<box hibit="22" width="1" name="op0" usename="1">
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<c colspan="1">1</c>
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</box>
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</decode>
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</node>
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</node>
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<node iclass="mul_word">
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<header>Multiply and Accumulate</header>
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<decode>
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<box hibit="25" width="1" name="op0" usename="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="24" width="5" name="op1" usename="1">
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<c colspan="5">0xxxx</c>
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</box>
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<box hibit="7" width="1" name="op2" usename="1">
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<c colspan="1">1</c>
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</box>
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<box hibit="6" width="2" name="op3" usename="1">
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<c colspan="2">00</c>
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</box>
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<box hibit="4" width="1" name="op4" usename="1">
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<c colspan="1">1</c>
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</box>
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</decode>
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</node>
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<node groupname="sync">
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<header>Synchronization primitives and Load-Acquire/Store-Release</header>
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<decode>
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<box hibit="25" width="1" name="op0" usename="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="24" width="5" name="op1" usename="1">
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<c colspan="5">1xxxx</c>
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</box>
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<box hibit="7" width="1" name="op2" usename="1">
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<c colspan="1">1</c>
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</box>
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<box hibit="6" width="2" name="op3" usename="1">
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<c colspan="2">00</c>
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</box>
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<box hibit="4" width="1" name="op4" usename="1">
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<c colspan="1">1</c>
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</box>
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</decode>
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<regdiagram form="32">
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<box hibit="31" width="4">
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<c colspan="4">!= 1111</c>
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</box>
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<box hibit="27" width="4">
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<c colspan="4">0001</c>
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</box>
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<box hibit="23" width="1" name="op0" usename="1">
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<c colspan="1" />
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</box>
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<box hibit="22" width="11">
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<c colspan="11" />
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</box>
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<box hibit="11" width="2">
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<c colspan="2">11</c>
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</box>
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<box hibit="9" width="2">
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<c colspan="2" />
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</box>
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<box hibit="7" width="4">
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<c colspan="4">1001</c>
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</box>
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<box hibit="3" width="4">
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<c colspan="4" />
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</box>
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</regdiagram>
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<node iclass="UNALLOCATED_34" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="23" width="1" name="op0" usename="1">
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<c colspan="1">0</c>
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</box>
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</decode>
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</node>
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<node iclass="ldst_excl">
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<header>Load/Store Exclusive and Load-Acquire/Store-Release</header>
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<decode>
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<box hibit="23" width="1" name="op0" usename="1">
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<c colspan="1">1</c>
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</box>
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</decode>
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</node>
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</node>
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<node groupname="dpmisc">
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<header>Miscellaneous</header>
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<decode>
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<box hibit="25" width="1" name="op0" usename="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="24" width="5" name="op1" usename="1">
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<c colspan="5">10xx0</c>
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</box>
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<box hibit="7" width="1" name="op2" usename="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="6" width="2" name="op3" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="4" width="1" name="op4" usename="1">
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<c colspan="1" />
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</box>
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</decode>
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<regdiagram form="32">
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<box hibit="31" width="4">
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<c colspan="4">!= 1111</c>
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</box>
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<box hibit="27" width="5">
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<c colspan="5">00010</c>
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</box>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="20" width="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="19" width="12">
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<c colspan="12" />
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</box>
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<box hibit="7" width="1">
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<c colspan="1">0</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3" />
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</box>
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<box hibit="3" width="4">
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<c colspan="4" />
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</box>
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</regdiagram>
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<node iclass="UNALLOCATED_22" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">00</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">001</c>
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_9" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">00</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">010</c>
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_26" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">00</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">011</c>
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_14" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">00</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">110</c>
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</box>
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</decode>
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</node>
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<node iclass="bx_reg">
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<header>Branch and Exchange (register)</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">01</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">001</c>
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</box>
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</decode>
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</node>
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<node iclass="bxj_reg">
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<header>Branch and Exchange to Jazelle (register)</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">01</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">010</c>
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</box>
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</decode>
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</node>
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<node iclass="blx_reg">
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<header>Branch with Link and Exchange (register)</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">01</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">011</c>
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_15" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">01</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">110</c>
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_24" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">10</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">001</c>
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_11" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">10</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">010</c>
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_28" unallocated="1">
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<header>UNALLOCATED</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">10</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">011</c>
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_16" unallocated="1">
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<header>UNALLOCATED</header>
|
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">10</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">110</c>
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</box>
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</decode>
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</node>
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<node iclass="clz">
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<header>Count Leading Zeros</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">11</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">001</c>
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</box>
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</decode>
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</node>
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<node iclass="UNALLOCATED_12" unallocated="1">
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<header>UNALLOCATED</header>
|
|
<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">11</c>
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|
</box>
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<box hibit="6" width="3" name="op1" usename="1">
|
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<c colspan="3">010</c>
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|
</box>
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|
</decode>
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|
</node>
|
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<node iclass="UNALLOCATED_29" unallocated="1">
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<header>UNALLOCATED</header>
|
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">11</c>
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|
</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">011</c>
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</box>
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</decode>
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</node>
|
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<node iclass="eret">
|
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<header>Exception Return</header>
|
|
<decode>
|
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2">11</c>
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">110</c>
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</box>
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</decode>
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</node>
|
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<node iclass="except">
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<header>Exception Generation</header>
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<decode>
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2" />
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|
</box>
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<box hibit="6" width="3" name="op1" usename="1">
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<c colspan="3">111</c>
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|
</box>
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</decode>
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</node>
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<node iclass="movsr_reg">
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<header>Move special register (register)</header>
|
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<decode>
|
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<box hibit="22" width="2" name="op0" usename="1">
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<c colspan="2" />
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</box>
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<box hibit="6" width="3" name="op1" usename="1">
|
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<c colspan="3">000</c>
|
|
</box>
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|
</decode>
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</node>
|
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<node iclass="crc32">
|
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<header>Cyclic Redundancy Check</header>
|
|
<decode>
|
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<box hibit="22" width="2" name="op0" usename="1">
|
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<c colspan="2" />
|
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</box>
|
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<box hibit="6" width="3" name="op1" usename="1">
|
|
<c colspan="3">100</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="intsat">
|
|
<header>Integer Saturating Arithmetic</header>
|
|
<decode>
|
|
<box hibit="22" width="2" name="op0" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="6" width="3" name="op1" usename="1">
|
|
<c colspan="3">101</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node iclass="mul_half">
|
|
<header>Halfword Multiply and Accumulate</header>
|
|
<decode>
|
|
<box hibit="25" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">10xx0</c>
|
|
</box>
|
|
<box hibit="7" width="1" name="op2" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="6" width="2" name="op3" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op4" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="dpregis">
|
|
<header>Data-processing register (immediate shift)</header>
|
|
<decode>
|
|
<box hibit="25" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">!= 10xx0</c>
|
|
</box>
|
|
<box hibit="7" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="6" width="2" name="op3" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op4" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="4">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="22" width="2">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="15">
|
|
<c colspan="15" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="op0:op1" op="!=" val="100" />
|
|
</decode_constraints>
|
|
<node iclass="intdp3reg_immsh">
|
|
<header>Integer Data Processing (three register, immediate shift)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="intdp2reg_immsh">
|
|
<header>Integer Test and Compare (two register, immediate shift)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="logic3reg_immsh">
|
|
<header>Logical Arithmetic (three register, immediate shift)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="dpregrs">
|
|
<header>Data-processing register (register shift)</header>
|
|
<decode>
|
|
<box hibit="25" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5">!= 10xx0</c>
|
|
</box>
|
|
<box hibit="7" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="6" width="2" name="op3" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op4" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="4">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="22" width="2">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="12">
|
|
<c colspan="12" />
|
|
</box>
|
|
<box hibit="7" width="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="6" width="2">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="op0:op1" op="!=" val="100" />
|
|
</decode_constraints>
|
|
<node iclass="intdp3reg_regsh">
|
|
<header>Integer Data Processing (three register, register shift)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="intdp2reg_regsh">
|
|
<header>Integer Test and Compare (two register, register shift)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="logic3reg_regsh">
|
|
<header>Logical Arithmetic (three register, register shift)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="dpimm">
|
|
<header>Data-processing immediate</header>
|
|
<decode>
|
|
<box hibit="25" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op1" usename="1">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="7" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="6" width="2" name="op3" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="4">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3">
|
|
<c colspan="3">001</c>
|
|
</box>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="22" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="19" width="20">
|
|
<c colspan="20" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="intdp2reg_imm">
|
|
<header>Integer Data Processing (two register and immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="movw">
|
|
<header>Move Halfword (immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="movsr_hint_imm">
|
|
<header>Move Special Register and Hints (immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="intdp1reg_imm">
|
|
<header>Integer Test and Compare (one register and immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">x1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="log2reg_imm">
|
|
<header>Logical Arithmetic (two register and immediate)</header>
|
|
<decode>
|
|
<box hibit="24" width="2" name="op0" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
</node>
|
|
<node iclass="ldstimm">
|
|
<header>Load/Store Word, Unsigned Byte (immediate, literal)</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" name="op0" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldstreg">
|
|
<header>Load/Store Word, Unsigned Byte (register)</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" name="op0" usename="1">
|
|
<c colspan="3">011</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="media">
|
|
<header>Media instructions</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" name="op0" usename="1">
|
|
<c colspan="3">011</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="4">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3">
|
|
<c colspan="3">011</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="19" width="12">
|
|
<c colspan="12" />
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="parallel">
|
|
<header>Parallel Arithmetic</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">00xxx</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="selbytes">
|
|
<header>Select Bytes</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01000</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">101</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_85" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01000</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">001</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="pack">
|
|
<header>Pack Halfword</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01000</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">xx0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_87" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01001</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">x01</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_82" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01001</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">xx0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_91" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">0110x</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">x01</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_84" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">0110x</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">xx0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="sat16">
|
|
<header>Saturate 16-bit</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01x10</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">001</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_89" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01x10</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">101</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="reverse">
|
|
<header>Reverse Bit/Byte</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01x11</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">x01</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="sat32">
|
|
<header>Saturate 32-bit</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01x1x</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">xx0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_93" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01xxx</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="extend">
|
|
<header>Extend and Add</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">01xxx</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">011</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="smul_div">
|
|
<header>Signed multiply, Divide</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">10xxx</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="usad">
|
|
<header>Unsigned Sum of Absolute Differences</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">11000</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_96" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">11000</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">100</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_97" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">11001</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">x00</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_98" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">1101x</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">x00</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_105" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">110xx</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_106" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">1110x</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="bfi">
|
|
<header>Bitfield Insert</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">1110x</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">x00</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_107" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">11110</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="udf">
|
|
<header>Permanently UNDEFINED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">11111</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_100" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">1111x</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">x00</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_102" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">11x0x</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">x10</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="bfx">
|
|
<header>Bitfield Extract</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">11x1x</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">x10</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_104" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">11xxx</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">011</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_101" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">11xxx</c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op1" usename="1">
|
|
<c colspan="3">x01</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="brblk">
|
|
<header>Branch, branch with link, and block data transfer</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="27" width="3" name="op0" usename="1">
|
|
<c colspan="3">10x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="27" width="2">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="25" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="24" width="25">
|
|
<c colspan="25" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="ldstexcept">
|
|
<header>Exception Save/Restore</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="25" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldstm">
|
|
<header>Load/Store Multiple</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="25" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="b_imm">
|
|
<header>Branch (immediate)</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="25" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="cops_as">
|
|
<header>System register access, Advanced SIMD, floating-point, and Supervisor call</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="27" width="3" name="op0" usename="1">
|
|
<c colspan="3">11x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="27" width="2">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op0" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="23" width="12">
|
|
<c colspan="12" />
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="9" width="5">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="UNALLOCATED_113" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="25" width="2" name="op0" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_120" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="25" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="svcall">
|
|
<header>Supervisor call</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="25" width="2" name="op0" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="27" width="4">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="23" width="24">
|
|
<c colspan="24" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="UNALLOCATED_142" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="svc">
|
|
<header>Supervisor Call</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="advsimdext">
|
|
<header>Unconditional Advanced SIMD and floating-point instructions</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op0" usename="1">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="6">
|
|
<c colspan="6">111111</c>
|
|
</box>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="22" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="15" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="11" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="7" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="5" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="op0<2:1>" op="!=" val="11" />
|
|
</decode_constraints>
|
|
<node iclass="simd3reg_sameext">
|
|
<header>Advanced SIMD three registers of the same length extension</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">0xx</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fpcsel">
|
|
<header>Floating-point conditional select</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">100</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fpminmaxnm">
|
|
<header>Floating-point minNum/maxNum</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">101</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6">00xxxx</c>
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fpextins">
|
|
<header>Floating-point extraction and insertion</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">101</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6">110000</c>
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fpcvtrnd">
|
|
<header>Floating-point directed convert to integer</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">101</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6">111xxx</c>
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="floatdpmac">
|
|
<header>Advanced SIMD and floating-point multiply with accumulate</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">10x</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">00</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd_dotprod">
|
|
<header>Advanced SIMD and floating-point dot product</header>
|
|
<decode>
|
|
<box hibit="25" width="3" name="op0" usename="1">
|
|
<c colspan="3">10x</c>
|
|
</box>
|
|
<box hibit="21" width="6" name="op1" usename="1">
|
|
<c colspan="6" />
|
|
</box>
|
|
<box hibit="10" width="1" name="op2" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="op3" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op4" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op5" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="sysldst_mov64">
|
|
<header>Advanced SIMD and System register load/store and 64-bit move</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op0" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op2" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="4">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3">
|
|
<c colspan="3">110</c>
|
|
</box>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="20" width="9">
|
|
<c colspan="9" />
|
|
</box>
|
|
<box hibit="11" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="8" width="9">
|
|
<c colspan="9" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="movsimdfpgp64">
|
|
<header>Advanced SIMD and floating-point 64-bit move</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">00x0</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="movcpgp64">
|
|
<header>System register 64-bit move</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">00x0</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldstsimdfp">
|
|
<header>Advanced SIMD and floating-point load/store</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">!= 00x0</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldstcp">
|
|
<header>System register load/store</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4">!= 00x0</c>
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_117" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="4" name="op0" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="10" width="2" name="op1" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="sys_mov32">
|
|
<header>Advanced SIMD and System register 32-bit move</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">1x</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op2" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="4">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="4">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="20" width="9">
|
|
<c colspan="9" />
|
|
</box>
|
|
<box hibit="11" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="7" width="3">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="UNALLOCATED_124" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="movfpgp16">
|
|
<header>Floating-point 16-bit move</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">001</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="movfpgp32">
|
|
<header>Floating-point 32-bit move</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">000</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_127" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">001</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_128" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">01x</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_129" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">10x</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_130" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">110</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="movfpsr">
|
|
<header>Floating-point move special register</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3">111</c>
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">010</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="movsimdgp">
|
|
<header>Advanced SIMD 8/16/32-bit element move/duplicate</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">011</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_133" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">10x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="movcpgp32">
|
|
<header>System register 32-bit move</header>
|
|
<decode>
|
|
<box hibit="23" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="10" width="3" name="op1" usename="1">
|
|
<c colspan="3">11x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="fpdp">
|
|
<header>Floating-point data-processing</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="4">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="4">
|
|
<c colspan="4">1110</c>
|
|
</box>
|
|
<box hibit="23" width="4" name="op0" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="19" width="8">
|
|
<c colspan="8" />
|
|
</box>
|
|
<box hibit="11" width="2">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="9" width="3">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="5" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="fpdp2reg">
|
|
<header>Floating-point data-processing (two registers)</header>
|
|
<decode>
|
|
<box hibit="23" width="4" name="op0" usename="1">
|
|
<c colspan="4">1x11</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fpimm">
|
|
<header>Floating-point move immediate</header>
|
|
<decode>
|
|
<box hibit="23" width="4" name="op0" usename="1">
|
|
<c colspan="4">1x11</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="fpdp3reg">
|
|
<header>Floating-point data-processing (three registers)</header>
|
|
<decode>
|
|
<box hibit="23" width="4" name="op0" usename="1">
|
|
<c colspan="4">!= 1x11</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node iclass="unalloc_cops3" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="25" width="2" name="op0" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op2" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="uncond_as">
|
|
<header>Unconditional instructions</header>
|
|
<decode>
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4">1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" name="op0" usename="1">
|
|
<c colspan="3">0xx</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="5">
|
|
<c colspan="5">11110</c>
|
|
</box>
|
|
<box hibit="26" width="3" name="op0" usename="1">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="23" width="3">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="19" width="20">
|
|
<c colspan="20" />
|
|
</box>
|
|
</regdiagram>
|
|
<node groupname="uncondmisc">
|
|
<header>Miscellaneous</header>
|
|
<decode>
|
|
<box hibit="26" width="3" name="op0" usename="1">
|
|
<c colspan="3">00x</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="7">
|
|
<c colspan="7">1111000</c>
|
|
</box>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="19" width="12">
|
|
<c colspan="12" />
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="UNALLOCATED_38" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">0xxxx</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="cps">
|
|
<header>Change Process State</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">10000</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">xx0x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_43" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">10001</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">1000</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_42" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">10001</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">x100</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_41" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">10001</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">xx01</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="setpan">
|
|
<header>SETPAN</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">10001</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">0000</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_44" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">1000x</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">0111</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNPREDICTABLE_46" unpredictable="1">
|
|
<header>UNPREDICTABLE</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">10010</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">0111</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_47" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">10011</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">0111</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_45" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">1001x</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">xx0x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_48" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">100xx</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">0011</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_49" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">100xx</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">0x10</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_50" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">100xx</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4">1x1x</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_51" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">101xx</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_52" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="24" width="5" name="op0" usename="1">
|
|
<c colspan="5">11xxx</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="op1" usename="1">
|
|
<c colspan="4" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="advsimddp">
|
|
<header>Advanced SIMD data-processing</header>
|
|
<decode>
|
|
<box hibit="26" width="3" name="op0" usename="1">
|
|
<c colspan="3">01x</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="7">
|
|
<c colspan="7">1111001</c>
|
|
</box>
|
|
<box hibit="24" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="22" width="18">
|
|
<c colspan="18" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="simd3reg_same">
|
|
<header>Advanced SIMD three registers of the same length</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node groupname="a_simd_mulreg">
|
|
<header>Advanced SIMD two registers, or three registers of different lengths</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="7">
|
|
<c colspan="7">1111001</c>
|
|
</box>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="23" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="22" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="19" width="8">
|
|
<c colspan="8" />
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="9" width="3">
|
|
<c colspan="3" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="5" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="simd3reg_ext">
|
|
<header>Advanced SIMD vector extract</header>
|
|
<decode>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd2reg_misc">
|
|
<header>Advanced SIMD two registers misc</header>
|
|
<decode>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">0x</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd3reg_tbl">
|
|
<header>Advanced SIMD table permute</header>
|
|
<decode>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">10</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd2reg_dup">
|
|
<header>Advanced SIMD duplicate (scalar)</header>
|
|
<decode>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd3reg_diff">
|
|
<header>Advanced SIMD three registers of different lengths</header>
|
|
<decode>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd2reg_scalar">
|
|
<header>Advanced SIMD two registers and a scalar</header>
|
|
<decode>
|
|
<box hibit="24" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="2" name="op1" usename="1">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op2" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="6" width="1" name="op3" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="a_simd_12reg">
|
|
<header>Advanced SIMD shifts and immediate generation</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="7">
|
|
<c colspan="7">1111001</c>
|
|
</box>
|
|
<box hibit="24" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="23" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="22" width="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="21" width="15" name="op0" usename="1">
|
|
<c colspan="15" />
|
|
</box>
|
|
<box hibit="6" width="2">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="4" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="simd1reg_imm">
|
|
<header>Advanced SIMD one register and modified immediate</header>
|
|
<decode>
|
|
<box hibit="21" width="15" name="op0" usename="1">
|
|
<c colspan="15">000xxxxxxxxxxx0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="simd2reg_shift">
|
|
<header>Advanced SIMD two registers and shift amount</header>
|
|
<decode>
|
|
<box hibit="21" width="15" name="op0" usename="1">
|
|
<c colspan="15">!= 000xxxxxxxxxxx0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
</node>
|
|
<node groupname="uncondhints">
|
|
<header>Memory hints and barriers</header>
|
|
<decode>
|
|
<box hibit="26" width="3" name="op0" usename="1">
|
|
<c colspan="3">1xx</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="6">
|
|
<c colspan="6">111101</c>
|
|
</box>
|
|
<box hibit="25" width="5" name="op0" usename="1">
|
|
<c colspan="5" />
|
|
</box>
|
|
<box hibit="20" width="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="19" width="15">
|
|
<c colspan="15" />
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="3" width="4">
|
|
<c colspan="4" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="UNPREDICTABLE_70" unpredictable="1">
|
|
<header>UNPREDICTABLE</header>
|
|
<decode>
|
|
<box hibit="25" width="5" name="op0" usename="1">
|
|
<c colspan="5">00xx1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNPREDICTABLE_69" unpredictable="1">
|
|
<header>UNPREDICTABLE</header>
|
|
<decode>
|
|
<box hibit="25" width="5" name="op0" usename="1">
|
|
<c colspan="5">01001</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="barriers">
|
|
<header>Barriers</header>
|
|
<decode>
|
|
<box hibit="25" width="5" name="op0" usename="1">
|
|
<c colspan="5">01011</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNPREDICTABLE_72" unpredictable="1">
|
|
<header>UNPREDICTABLE</header>
|
|
<decode>
|
|
<box hibit="25" width="5" name="op0" usename="1">
|
|
<c colspan="5">011x1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="preload_imm">
|
|
<header>Preload (immediate)</header>
|
|
<decode>
|
|
<box hibit="25" width="5" name="op0" usename="1">
|
|
<c colspan="5">0xxx0</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="preload_reg">
|
|
<header>Preload (register)</header>
|
|
<decode>
|
|
<box hibit="25" width="5" name="op0" usename="1">
|
|
<c colspan="5">1xxx0</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNPREDICTABLE_78" unpredictable="1">
|
|
<header>UNPREDICTABLE</header>
|
|
<decode>
|
|
<box hibit="25" width="5" name="op0" usename="1">
|
|
<c colspan="5">1xxx1</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_79" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="25" width="5" name="op0" usename="1">
|
|
<c colspan="5">1xxxx</c>
|
|
</box>
|
|
<box hibit="4" width="1" name="op1" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node groupname="advsimdls">
|
|
<header>Advanced SIMD element or structure load/store</header>
|
|
<decode>
|
|
<box hibit="26" width="3" name="op0" usename="1">
|
|
<c colspan="3">100</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
<regdiagram form="32">
|
|
<box hibit="31" width="8">
|
|
<c colspan="8">11110100</c>
|
|
</box>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1" />
|
|
</box>
|
|
<box hibit="22" width="2">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="20" width="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="19" width="8">
|
|
<c colspan="8" />
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
<box hibit="9" width="10">
|
|
<c colspan="10" />
|
|
</box>
|
|
</regdiagram>
|
|
<node iclass="ldstv_ms">
|
|
<header>Advanced SIMD load/store multiple structures</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2" />
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldv_ssall">
|
|
<header>Advanced SIMD load single structure to all lanes</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">11</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="ldstv_ssone">
|
|
<header>Advanced SIMD load/store single structure to one lane</header>
|
|
<decode>
|
|
<box hibit="23" width="1" name="op0" usename="1">
|
|
<c colspan="1">1</c>
|
|
</box>
|
|
<box hibit="11" width="2" name="op1" usename="1">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
<node iclass="unalloc2" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="26" width="3" name="op0" usename="1">
|
|
<c colspan="3">101</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
<node iclass="UNALLOCATED_109" unallocated="1">
|
|
<header>UNALLOCATED</header>
|
|
<decode>
|
|
<box hibit="26" width="3" name="op0" usename="1">
|
|
<c colspan="3">11x</c>
|
|
</box>
|
|
<box hibit="20" width="1" name="op1" usename="1">
|
|
<c colspan="1">0</c>
|
|
</box>
|
|
</decode>
|
|
</node>
|
|
</node>
|
|
</hierarchy>
|
|
<groups heading="Top-level Encoding Groups">
|
|
<maintable class="grouptable" size="32" howmanybits="32">
|
|
<col bitno="31" colno="1" printwidth="0.019in" />
|
|
<col bitno="30" colno="2" printwidth="0.019in" />
|
|
<col bitno="29" colno="3" printwidth="0.019in" />
|
|
<col bitno="28" colno="4" printwidth="0.019in" />
|
|
<col bitno="27" colno="5" printwidth="0.019in" />
|
|
<col bitno="26" colno="6" printwidth="0.019in" />
|
|
<col bitno="25" colno="7" printwidth="0.019in" />
|
|
<col bitno="24" colno="8" printwidth="0.019in" />
|
|
<col bitno="23" colno="9" printwidth="0.019in" />
|
|
<col bitno="22" colno="10" printwidth="0.019in" />
|
|
<col bitno="21" colno="11" printwidth="0.019in" />
|
|
<col bitno="20" colno="12" printwidth="0.019in" />
|
|
<col bitno="19" colno="13" printwidth="0.019in" />
|
|
<col bitno="18" colno="14" printwidth="0.019in" />
|
|
<col bitno="17" colno="15" printwidth="0.019in" />
|
|
<col bitno="16" colno="16" printwidth="0.019in" />
|
|
<col bitno="15" colno="17" printwidth="0.019in" />
|
|
<col bitno="14" colno="18" printwidth="0.019in" />
|
|
<col bitno="13" colno="19" printwidth="0.019in" />
|
|
<col bitno="12" colno="20" printwidth="0.019in" />
|
|
<col bitno="11" colno="21" printwidth="0.019in" />
|
|
<col bitno="10" colno="22" printwidth="0.019in" />
|
|
<col bitno="9" colno="23" printwidth="0.019in" />
|
|
<col bitno="8" colno="24" printwidth="0.019in" />
|
|
<col bitno="7" colno="25" printwidth="0.019in" />
|
|
<col bitno="6" colno="26" printwidth="0.019in" />
|
|
<col bitno="5" colno="27" printwidth="0.019in" />
|
|
<col bitno="4" colno="28" printwidth="0.019in" />
|
|
<col bitno="3" colno="29" printwidth="0.019in" />
|
|
<col bitno="2" colno="30" printwidth="0.019in" />
|
|
<col bitno="1" colno="31" printwidth="0.019in" />
|
|
<col bitno="0" colno="32" printwidth="0.019in" />
|
|
<col colno="33" printwidth="0.400in" />
|
|
<tableheader>
|
|
<tr class="header1">
|
|
<th colno="1" colspan="32">Instruction bits</th>
|
|
<th colno="33" rowspan="2">Encoding Group</th>
|
|
</tr>
|
|
<tr class="header2-morebits">
|
|
<th class="boxleft">31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th class="boxright">0</th>
|
|
</tr>
|
|
</tableheader>
|
|
<tablebody>
|
|
<tr class="maintable" size="32" groupid="main" groupname="dp">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a>Data-processing and miscellaneous instructions</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="main" iclass="ldstwbi">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstwbi">Load/store word and unsigned byte (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="main" iclass="ldstwbr">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstwbr">Load/store word and unsigned byte (register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="main" iclass="media">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="media">Media instructions</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="main" iclass="brblk">
|
|
<td class="boxleft"></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="brblk">Branch, branch with link, and block data transfer</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="main" groupname="cops_as">
|
|
<td class="boxleft"></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a>System register access, Advanced SIMD, floating-point, and Supervisor call</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="main" groupname="uncond_as">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a>Unconditional instructions</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dp" iclass="dpregis">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td colspan="5">!= 10xx0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dpregis">Data-processing and miscellaneous instructions / Data-processing register (immediate shift)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dp" iclass="dpregrs">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td colspan="5">!= 10xx0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dpregrs">Data-processing and miscellaneous instructions / Data-processing register (register shift)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dp" iclass="dpmisc">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dpmisc">Data-processing and miscellaneous instructions / Miscellaneous</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dp" iclass="dphwm">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dphwm">Data-processing and miscellaneous instructions / Halfword multiply and multiply accumulate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dp" iclass="dpmul">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dpmul">Data-processing and miscellaneous instructions / Multiply and multiply accumulate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dp" iclass="sync">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="sync">Data-processing and miscellaneous instructions / Synchronization primitives and Load-Acquire/Store-Release</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dp" iclass="xldst">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="xldst">Data-processing and miscellaneous instructions / Extra load/store</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dp" iclass="dpimm">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="dpimm">Data-processing and miscellaneous instructions / Data-processing immediate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="cops_as" iclass="unalloc_cops1">
|
|
<td class="boxleft"></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">System register access, Advanced SIMD, floating-point, and Supervisor call / UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="cops_as" iclass="unalloc_cops2">
|
|
<td class="boxleft"></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">System register access, Advanced SIMD, floating-point, and Supervisor call / UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="cops_as" iclass="sysldst_mov64">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="sysldst_mov64">System register access, Advanced SIMD, floating-point, and Supervisor call / Advanced SIMD and System register load/store and 64-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="cops_as" iclass="fpdp">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fpdp">System register access, Advanced SIMD, floating-point, and Supervisor call / Floating-point data-processing</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" undef="1" groupid="cops_as" iclass="unalloc_cops3">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">System register access, Advanced SIMD, floating-point, and Supervisor call / UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="cops_as" iclass="sys_mov32">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="sys_mov32">System register access, Advanced SIMD, floating-point, and Supervisor call / Advanced SIMD and System register 32-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="cops_as" iclass="advsimdext">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td colspan="2">!= 11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="advsimdext">System register access, Advanced SIMD, floating-point, and Supervisor call / Unconditional Advanced SIMD and floating-point instructions</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="cops_as" iclass="svcall">
|
|
<td class="boxleft"></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="svcall">System register access, Advanced SIMD, floating-point, and Supervisor call / Supervisor call</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="uncond_as" iclass="uncondmisc">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="uncondmisc">Unconditional instructions / Miscellaneous</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="uncond_as" groupname="advsimddp">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a>Unconditional instructions / Advanced SIMD data-processing</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="uncond_as" iclass="uncondhints">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="uncondhints">Unconditional instructions / Memory hints and barriers</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="uncond_as" iclass="advsimdls">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="advsimdls">Unconditional instructions / Advanced SIMD element or structure load/store</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" undef="1" groupid="uncond_as" iclass="unalloc2">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">Unconditional instructions / UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncond_as" iclass="unalloc3">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">Unconditional instructions / UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimddp" iclass="a_simd3reg_same">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="a_simd3reg_same">Unconditional instructions / Advanced SIMD data-processing / Advanced SIMD three registers of the same length</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimddp" iclass="a_simd_mulreg">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="a_simd_mulreg">Unconditional instructions / Advanced SIMD data-processing / Advanced SIMD two registers, or three registers of different lengths</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimddp" iclass="a_simd_12reg">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="a_simd_12reg">Unconditional instructions / Advanced SIMD data-processing / Advanced SIMD shifts and immediate generation</a>
|
|
</td>
|
|
</tr>
|
|
</tablebody>
|
|
</maintable>
|
|
</groups>
|
|
<maintable class="allclasses" size="32" howmanybits="32">
|
|
<col bitno="31" colno="1" printwidth="0.019in" />
|
|
<col bitno="30" colno="2" printwidth="0.019in" />
|
|
<col bitno="29" colno="3" printwidth="0.019in" />
|
|
<col bitno="28" colno="4" printwidth="0.019in" />
|
|
<col bitno="27" colno="5" printwidth="0.019in" />
|
|
<col bitno="26" colno="6" printwidth="0.019in" />
|
|
<col bitno="25" colno="7" printwidth="0.019in" />
|
|
<col bitno="24" colno="8" printwidth="0.019in" />
|
|
<col bitno="23" colno="9" printwidth="0.019in" />
|
|
<col bitno="22" colno="10" printwidth="0.019in" />
|
|
<col bitno="21" colno="11" printwidth="0.019in" />
|
|
<col bitno="20" colno="12" printwidth="0.019in" />
|
|
<col bitno="19" colno="13" printwidth="0.019in" />
|
|
<col bitno="18" colno="14" printwidth="0.019in" />
|
|
<col bitno="17" colno="15" printwidth="0.019in" />
|
|
<col bitno="16" colno="16" printwidth="0.019in" />
|
|
<col bitno="15" colno="17" printwidth="0.019in" />
|
|
<col bitno="14" colno="18" printwidth="0.019in" />
|
|
<col bitno="13" colno="19" printwidth="0.019in" />
|
|
<col bitno="12" colno="20" printwidth="0.019in" />
|
|
<col bitno="11" colno="21" printwidth="0.019in" />
|
|
<col bitno="10" colno="22" printwidth="0.019in" />
|
|
<col bitno="9" colno="23" printwidth="0.019in" />
|
|
<col bitno="8" colno="24" printwidth="0.019in" />
|
|
<col bitno="7" colno="25" printwidth="0.019in" />
|
|
<col bitno="6" colno="26" printwidth="0.019in" />
|
|
<col bitno="5" colno="27" printwidth="0.019in" />
|
|
<col bitno="4" colno="28" printwidth="0.019in" />
|
|
<col bitno="3" colno="29" printwidth="0.019in" />
|
|
<col bitno="2" colno="30" printwidth="0.019in" />
|
|
<col bitno="1" colno="31" printwidth="0.019in" />
|
|
<col bitno="0" colno="32" printwidth="0.019in" />
|
|
<col colno="33" printwidth="0.400in" />
|
|
<tableheader>
|
|
<tr class="header1">
|
|
<th colno="1" colspan="32">Instruction bits</th>
|
|
<th colno="33" rowspan="2">Instruction class</th>
|
|
</tr>
|
|
<tr class="header2-morebits">
|
|
<th class="boxleft">31</th>
|
|
<th>30</th>
|
|
<th>29</th>
|
|
<th>28</th>
|
|
<th>27</th>
|
|
<th>26</th>
|
|
<th>25</th>
|
|
<th>24</th>
|
|
<th>23</th>
|
|
<th>22</th>
|
|
<th>21</th>
|
|
<th>20</th>
|
|
<th>19</th>
|
|
<th>18</th>
|
|
<th>17</th>
|
|
<th>16</th>
|
|
<th>15</th>
|
|
<th>14</th>
|
|
<th>13</th>
|
|
<th>12</th>
|
|
<th>11</th>
|
|
<th>10</th>
|
|
<th>9</th>
|
|
<th>8</th>
|
|
<th>7</th>
|
|
<th>6</th>
|
|
<th>5</th>
|
|
<th>4</th>
|
|
<th>3</th>
|
|
<th>2</th>
|
|
<th>1</th>
|
|
<th class="boxright">0</th>
|
|
</tr>
|
|
</tableheader>
|
|
<tablebody>
|
|
<maintablesect sect="Load/store word and unsigned byte (immediate)" linkref="ldstwbi" />
|
|
<tr class="maintable" size="32" groupid="ldstwbi" iclass="ldstimm">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstimm">Load/Store Word, Unsigned Byte (immediate, literal)</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Load/store word and unsigned byte (register)" linkref="ldstwbr" />
|
|
<tr class="maintable" size="32" groupid="ldstwbr" iclass="ldstreg">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstreg">Load/Store Word, Unsigned Byte (register)</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Media instructions" linkref="media" />
|
|
<tr class="maintable" size="32" groupid="media" iclass="parallel">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="parallel">Parallel Arithmetic</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="extend">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="extend">Extend and Add</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_93">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="sat32">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="sat32">Saturate 32-bit</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="sat16">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="sat16">Saturate 16-bit</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_89">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="reverse">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="reverse">Reverse Bit/Byte</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="pack">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="pack">Pack Halfword</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_85">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="selbytes">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="selbytes">Select Bytes</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_82">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_87">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_84">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_91">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="smul_div">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="smul_div">Signed multiply, Divide</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_101">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_104">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_102">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="bfx">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="bfx">Bitfield Extract</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_105">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="usad">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="usad">Unsigned Sum of Absolute Differences</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_96">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_97">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_98">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="bfi">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="bfi">Bitfield Insert</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_106">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_100">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="media" iclass="UNALLOCATED_107">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="media" iclass="udf">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="udf">Permanently UNDEFINED</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Branch, branch with link, and block data transfer" linkref="brblk" />
|
|
<tr class="maintable" size="32" groupid="brblk" iclass="b_imm">
|
|
<td class="boxleft"></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="b_imm">Branch (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="brblk" iclass="ldstexcept">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstexcept">Exception Save/Restore</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="brblk" iclass="ldstm">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstm">Load/Store Multiple</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Data-processing register (immediate shift)" linkref="dpregis" />
|
|
<tr class="maintable" size="32" groupid="dpregis" iclass="intdp3reg_immsh">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="intdp3reg_immsh">Integer Data Processing (three register, immediate shift)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpregis" iclass="intdp2reg_immsh">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="intdp2reg_immsh">Integer Test and Compare (two register, immediate shift)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpregis" iclass="logic3reg_immsh">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="logic3reg_immsh">Logical Arithmetic (three register, immediate shift)</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Data-processing register (register shift)" linkref="dpregrs" />
|
|
<tr class="maintable" size="32" groupid="dpregrs" iclass="intdp3reg_regsh">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="intdp3reg_regsh">Integer Data Processing (three register, register shift)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpregrs" iclass="intdp2reg_regsh">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="intdp2reg_regsh">Integer Test and Compare (two register, register shift)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpregrs" iclass="logic3reg_regsh">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="logic3reg_regsh">Logical Arithmetic (three register, register shift)</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Miscellaneous" linkref="dpmisc" />
|
|
<tr class="maintable" size="32" groupid="dpmisc" iclass="movsr_reg">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movsr_reg">Move special register (register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpmisc" iclass="crc32">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="crc32">Cyclic Redundancy Check</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpmisc" iclass="intsat">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="intsat">Integer Saturating Arithmetic</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpmisc" iclass="except">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="except">Exception Generation</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_22">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_9">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_26">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_14">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpmisc" iclass="bx_reg">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="bx_reg">Branch and Exchange (register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpmisc" iclass="bxj_reg">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="bxj_reg">Branch and Exchange to Jazelle (register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpmisc" iclass="blx_reg">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="blx_reg">Branch with Link and Exchange (register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_15">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_24">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_11">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_28">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_16">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpmisc" iclass="clz">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="clz">Count Leading Zeros</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_12">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="dpmisc" iclass="UNALLOCATED_29">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpmisc" iclass="eret">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="eret">Exception Return</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Halfword multiply and multiply accumulate" linkref="dphwm" />
|
|
<tr class="maintable" size="32" groupid="dphwm" iclass="mul_half">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="mul_half">Halfword Multiply and Accumulate</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Multiply and multiply accumulate" linkref="dpmul" />
|
|
<tr class="maintable" size="32" groupid="dpmul" iclass="mul_word">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="mul_word">Multiply and Accumulate</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Synchronization primitives and Load-Acquire/Store-Release" linkref="sync" />
|
|
<tr class="maintable" size="32" undef="1" groupid="sync" iclass="UNALLOCATED_34">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="sync" iclass="ldst_excl">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldst_excl">Load/Store Exclusive and Load-Acquire/Store-Release</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Extra load/store" linkref="xldst" />
|
|
<tr class="maintable" size="32" groupid="xldst" iclass="ldstxreg">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstxreg">Load/Store Dual, Half, Signed Byte (register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="xldst" iclass="ldstximm">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstximm">Load/Store Dual, Half, Signed Byte (immediate, literal)</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Data-processing immediate" linkref="dpimm" />
|
|
<tr class="maintable" size="32" groupid="dpimm" iclass="intdp2reg_imm">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="intdp2reg_imm">Integer Data Processing (two register and immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpimm" iclass="intdp1reg_imm">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="intdp1reg_imm">Integer Test and Compare (one register and immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpimm" iclass="movw">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movw">Move Halfword (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpimm" iclass="movsr_hint_imm">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movsr_hint_imm">Move Special Register and Hints (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="dpimm" iclass="log2reg_imm">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="log2reg_imm">Logical Arithmetic (two register and immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="UNALLOCATED" />
|
|
<tr class="maintable" size="32" undef="1" groupid="unalloc_cops1" iclass="UNALLOCATED_113">
|
|
<td class="boxleft"></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<maintablesect sect="UNALLOCATED" />
|
|
<tr class="maintable" size="32" undef="1" groupid="unalloc_cops2" iclass="UNALLOCATED_120">
|
|
<td class="boxleft"></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<maintablesect sect="Advanced SIMD and System register load/store and 64-bit move" linkref="sysldst_mov64" />
|
|
<tr class="maintable" size="32" undef="1" groupid="sysldst_mov64" iclass="UNALLOCATED_117">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="sysldst_mov64" iclass="movsimdfpgp64">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movsimdfpgp64">Advanced SIMD and floating-point 64-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="sysldst_mov64" iclass="movcpgp64">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movcpgp64">System register 64-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="sysldst_mov64" iclass="ldstsimdfp">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td colspan="4">!= 00x0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstsimdfp">Advanced SIMD and floating-point load/store</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="sysldst_mov64" iclass="ldstcp">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td colspan="4">!= 00x0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstcp">System register load/store</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Floating-point data-processing" linkref="fpdp" />
|
|
<tr class="maintable" size="32" groupid="fpdp" iclass="fpimm">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fpimm">Floating-point move immediate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="fpdp" iclass="fpdp2reg">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fpdp2reg">Floating-point data-processing (two registers)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="fpdp" iclass="fpdp3reg">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td colspan="4">!= 1x11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fpdp3reg">Floating-point data-processing (three registers)</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Advanced SIMD and System register 32-bit move" linkref="sys_mov32" />
|
|
<tr class="maintable" size="32" groupid="sys_mov32" iclass="movsimdgp">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movsimdgp">Advanced SIMD 8/16/32-bit element move/duplicate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="sys_mov32" iclass="UNALLOCATED_133">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="sys_mov32" iclass="movcpgp32">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movcpgp32">System register 32-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="sys_mov32" iclass="UNALLOCATED_124">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="sys_mov32" iclass="movfpgp16">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movfpgp16">Floating-point 16-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="sys_mov32" iclass="movfpgp32">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movfpgp32">Floating-point 32-bit move</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="sys_mov32" iclass="UNALLOCATED_127">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="sys_mov32" iclass="UNALLOCATED_128">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="sys_mov32" iclass="UNALLOCATED_129">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="sys_mov32" iclass="UNALLOCATED_130">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="sys_mov32" iclass="movfpsr">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="movfpsr">Floating-point move special register</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Unconditional Advanced SIMD and floating-point instructions" linkref="advsimdext" />
|
|
<tr class="maintable" size="32" groupid="advsimdext" iclass="simd3reg_sameext">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd3reg_sameext">Advanced SIMD three registers of the same length extension</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimdext" iclass="floatdpmac">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="floatdpmac">Advanced SIMD and floating-point multiply with accumulate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimdext" iclass="simd_dotprod">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd_dotprod">Advanced SIMD and floating-point dot product</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimdext" iclass="fpcsel">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fpcsel">Floating-point conditional select</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimdext" iclass="fpminmaxnm">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fpminmaxnm">Floating-point minNum/maxNum</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimdext" iclass="fpextins">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fpextins">Floating-point extraction and insertion</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimdext" iclass="fpcvtrnd">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td colspan="2">!= 00</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="fpcvtrnd">Floating-point directed convert to integer</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Supervisor call" linkref="svcall" />
|
|
<tr class="maintable" size="32" undef="1" groupid="svcall" iclass="UNALLOCATED_142">
|
|
<td class="boxleft">1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="svcall" iclass="svc">
|
|
<td colspan="4" class="boxleft">!= 1111</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="svc">Supervisor Call</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Miscellaneous" linkref="uncondmisc" />
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_38">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_49">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_48">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_50">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_44">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="uncondmisc" iclass="cps">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="cps">Change Process State</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_41">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_42">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="uncondmisc" iclass="setpan">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="setpan">SETPAN</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_43">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_45">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNPREDICTABLE_46">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNPREDICTABLE</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_47">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_51">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondmisc" iclass="UNALLOCATED_52">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<maintablesect sect="Memory hints and barriers" linkref="uncondhints" />
|
|
<tr class="maintable" size="32" groupid="uncondhints" iclass="preload_imm">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="preload_imm">Preload (immediate)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondhints" iclass="UNPREDICTABLE_70">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNPREDICTABLE</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondhints" iclass="UNPREDICTABLE_69">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNPREDICTABLE</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="uncondhints" iclass="barriers">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="barriers">Barriers</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondhints" iclass="UNPREDICTABLE_72">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNPREDICTABLE</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondhints" iclass="UNALLOCATED_79">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="uncondhints" iclass="preload_reg">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="preload_reg">Preload (register)</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" undef="1" groupid="uncondhints" iclass="UNPREDICTABLE_78">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNPREDICTABLE</td>
|
|
</tr>
|
|
<maintablesect sect="Advanced SIMD element or structure load/store" linkref="advsimdls" />
|
|
<tr class="maintable" size="32" groupid="advsimdls" iclass="ldstv_ms">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstv_ms">Advanced SIMD load/store multiple structures</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimdls" iclass="ldv_ssall">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldv_ssall">Advanced SIMD load single structure to all lanes</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="advsimdls" iclass="ldstv_ssone">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td colspan="2">!= 11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="ldstv_ssone">Advanced SIMD load/store single structure to one lane</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="UNALLOCATED" />
|
|
<tr class="maintable" size="32" undef="1" groupid="unalloc3" iclass="UNALLOCATED_109">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">UNALLOCATED</td>
|
|
</tr>
|
|
<maintablesect sect="Advanced SIMD three registers of the same length" linkref="a_simd3reg_same" />
|
|
<tr class="maintable" size="32" groupid="a_simd3reg_same" iclass="simd3reg_same">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd3reg_same">Advanced SIMD three registers of the same length</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Advanced SIMD two registers, or three registers of different lengths" linkref="a_simd_mulreg" />
|
|
<tr class="maintable" size="32" groupid="a_simd_mulreg" iclass="simd3reg_diff">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td colspan="2">!= 11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd3reg_diff">Advanced SIMD three registers of different lengths</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="a_simd_mulreg" iclass="simd2reg_scalar">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td colspan="2">!= 11</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd2reg_scalar">Advanced SIMD two registers and a scalar</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="a_simd_mulreg" iclass="simd3reg_ext">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd3reg_ext">Advanced SIMD vector extract</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="a_simd_mulreg" iclass="simd2reg_misc">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd2reg_misc">Advanced SIMD two registers misc</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="a_simd_mulreg" iclass="simd3reg_tbl">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd3reg_tbl">Advanced SIMD table permute</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="a_simd_mulreg" iclass="simd2reg_dup">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td>1</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>1</td>
|
|
<td>1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd2reg_dup">Advanced SIMD duplicate (scalar)</a>
|
|
</td>
|
|
</tr>
|
|
<maintablesect sect="Advanced SIMD shifts and immediate generation" linkref="a_simd_12reg" />
|
|
<tr class="maintable" size="32" groupid="a_simd_12reg" iclass="simd1reg_imm">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td>0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd1reg_imm">Advanced SIMD one register and modified immediate</a>
|
|
</td>
|
|
</tr>
|
|
<tr class="maintable" size="32" groupid="a_simd_12reg" iclass="simd2reg_shift">
|
|
<td class="boxleft" ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">1</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">0</td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td colspan="15">!= 000xxxxxxxxxxx0</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td ingroup="1">1</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="boxright"></td>
|
|
<td class="iclassname">
|
|
<a classid="simd2reg_shift">Advanced SIMD two registers and shift amount</a>
|
|
</td>
|
|
</tr>
|
|
</tablebody>
|
|
</maintable>
|
|
<funcgroupheader id="dpregrs">Data-processing register (register shift)</funcgroupheader>
|
|
<iclass_sect id="intdp3reg_regsh" title="Integer Data Processing (three register, register shift)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="opc" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="20" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rs" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="6" width="2" name="stype" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="intdp3reg_regsh" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="39*" />
|
|
<col colno="3" printwidth="14*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ANDS_rr_A1" iformfile="and_rr.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td class="iformname" iformid="AND_rr">AND, ANDS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EORS_rr_A1" iformfile="eor_rr.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td class="iformname" iformid="EOR_rr">EOR, EORS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_rr_A1" iformfile="sub_rr.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td class="iformname" iformid="SUB_rr">SUB, SUBS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSBS_rr_A1" iformfile="rsb_rr.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td class="iformname" iformid="RSB_rr">RSB, RSBS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_rr_A1" iformfile="add_rr.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td class="iformname" iformid="ADD_rr">ADD, ADDS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADCS_rr_A1" iformfile="adc_rr.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td class="iformname" iformid="ADC_rr">ADC, ADCS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SBCS_rr_A1" iformfile="sbc_rr.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td class="iformname" iformid="SBC_rr">SBC, SBCS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSCS_rr_A1" iformfile="rsc_rr.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td class="iformname" iformid="RSC_rr">RSC, RSCS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="intdp2reg_regsh" title="Integer Test and Compare (two register, register shift)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rs" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="6" width="2" name="stype" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="intdp2reg_regsh" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="33*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="TST_rr_A1" iformfile="tst_rr.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="TST_rr">TST (register-shifted register)</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TEQ_rr_A1" iformfile="teq_rr.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="TEQ_rr">TEQ (register-shifted register)</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMP_rr_A1" iformfile="cmp_rr.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="CMP_rr">CMP (register-shifted register)</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMN_rr_A1" iformfile="cmn_rr.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="CMN_rr">CMN (register-shifted register)</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="logic3reg_regsh" title="Logical Arithmetic (three register, register shift)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rs" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="6" width="2" name="stype" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="logic3reg_regsh" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="39*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ORRS_rr_A1" iformfile="orr_rr.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="ORR_rr">ORR, ORRS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOVS_rr_A1" iformfile="mov_rr.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="MOV_rr">MOV, MOVS (register-shifted register)</td>
|
|
<td class="enctags">A1, Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BICS_rr_A1" iformfile="bic_rr.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="BIC_rr">BIC, BICS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVNS_rr_A1" iformfile="mvn_rr.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="MVN_rr">MVN, MVNS (register-shifted register)</td>
|
|
<td class="enctags">Flag setting</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="dpregis">Data-processing register (immediate shift)</funcgroupheader>
|
|
<iclass_sect id="intdp3reg_immsh" title="Integer Data Processing (three register, immediate shift)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="opc" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="20" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="6" width="2" name="stype" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="intdp3reg_immsh" cols="6">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="12*" />
|
|
<col colno="5" printwidth="31*" />
|
|
<col colno="6" printwidth="36*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">S</th>
|
|
<th class="bitfields">Rn</th>
|
|
<th class="bitfields">imm5:stype</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ANDS_r_A1" iformfile="and_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="AND_r">AND, ANDS (register)</td>
|
|
<td class="enctags">A1, ANDS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ANDS_r_A1_RRX" iformfile="and_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="AND_r">AND, ANDS (register)</td>
|
|
<td class="enctags">A1, ANDS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EORS_r_A1" iformfile="eor_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="EOR_r">EOR, EORS (register)</td>
|
|
<td class="enctags">A1, EORS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EORS_r_A1_RRX" iformfile="eor_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="EOR_r">EOR, EORS (register)</td>
|
|
<td class="enctags">A1, EORS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_r_A1" iformfile="sub_r.xml" label="SUB, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="SUB_r">SUB, SUBS (register)</td>
|
|
<td class="enctags">A1, SUB, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_r_A1_RRX" iformfile="sub_r.xml" label="SUB, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="SUB_r">SUB, SUBS (register)</td>
|
|
<td class="enctags">A1, SUB, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_SP_r_A1" iformfile="sub_sp_r.xml" label="SUB, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="SUB_SP_r">SUB, SUBS (SP minus register)</td>
|
|
<td class="enctags">A1, SUB, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_SP_r_A1_RRX" iformfile="sub_sp_r.xml" label="SUB, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="SUB_SP_r">SUB, SUBS (SP minus register)</td>
|
|
<td class="enctags">A1, SUB, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_r_A1" iformfile="sub_r.xml" label="SUBS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="SUB_r">SUB, SUBS (register)</td>
|
|
<td class="enctags">A1, SUBS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_r_A1_RRX" iformfile="sub_r.xml" label="SUBS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="SUB_r">SUB, SUBS (register)</td>
|
|
<td class="enctags">A1, SUBS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_SP_r_A1" iformfile="sub_sp_r.xml" label="SUBS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="SUB_SP_r">SUB, SUBS (SP minus register)</td>
|
|
<td class="enctags">A1, SUBS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_SP_r_A1_RRX" iformfile="sub_sp_r.xml" label="SUBS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="SUB_SP_r">SUB, SUBS (SP minus register)</td>
|
|
<td class="enctags">A1, SUBS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSBS_r_A1" iformfile="rsb_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="RSB_r">RSB, RSBS (register)</td>
|
|
<td class="enctags">A1, RSBS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSBS_r_A1_RRX" iformfile="rsb_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="RSB_r">RSB, RSBS (register)</td>
|
|
<td class="enctags">A1, RSBS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_r_A1" iformfile="add_r.xml" label="ADD, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="ADD_r">ADD, ADDS (register)</td>
|
|
<td class="enctags">A1, ADD, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_r_A1_RRX" iformfile="add_r.xml" label="ADD, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="ADD_r">ADD, ADDS (register)</td>
|
|
<td class="enctags">A1, ADD, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_SP_r_A1" iformfile="add_sp_r.xml" label="ADD, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="ADD_SP_r">ADD, ADDS (SP plus register)</td>
|
|
<td class="enctags">A1, ADD, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_SP_r_A1_RRX" iformfile="add_sp_r.xml" label="ADD, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="ADD_SP_r">ADD, ADDS (SP plus register)</td>
|
|
<td class="enctags">A1, ADD, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_r_A1" iformfile="add_r.xml" label="ADDS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="ADD_r">ADD, ADDS (register)</td>
|
|
<td class="enctags">A1, ADDS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_r_A1_RRX" iformfile="add_r.xml" label="ADDS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="ADD_r">ADD, ADDS (register)</td>
|
|
<td class="enctags">A1, ADDS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_SP_r_A1" iformfile="add_sp_r.xml" label="ADDS, shift or rotate by value" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="ADD_SP_r">ADD, ADDS (SP plus register)</td>
|
|
<td class="enctags">A1, ADDS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_SP_r_A1_RRX" iformfile="add_sp_r.xml" label="ADDS, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="ADD_SP_r">ADD, ADDS (SP plus register)</td>
|
|
<td class="enctags">A1, ADDS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADCS_r_A1" iformfile="adc_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="ADC_r">ADC, ADCS (register)</td>
|
|
<td class="enctags">A1, ADCS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADCS_r_A1_RRX" iformfile="adc_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="ADC_r">ADC, ADCS (register)</td>
|
|
<td class="enctags">A1, ADCS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SBCS_r_A1" iformfile="sbc_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="SBC_r">SBC, SBCS (register)</td>
|
|
<td class="enctags">A1, SBCS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SBCS_r_A1_RRX" iformfile="sbc_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="SBC_r">SBC, SBCS (register)</td>
|
|
<td class="enctags">A1, SBCS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSCS_r_A1" iformfile="rsc_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="RSC_r">RSC, RSCS (register)</td>
|
|
<td class="enctags">RSCS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSCS_r_A1_RRX" iformfile="rsc_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="RSC_r">RSC, RSCS (register)</td>
|
|
<td class="enctags">RSCS, rotate right with extend</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="intdp2reg_immsh" title="Integer Test and Compare (two register, immediate shift)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="11" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="6" width="2" name="stype" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="intdp2reg_immsh" cols="4">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="12*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="30*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">imm5:stype</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="TST_r_A1" iformfile="tst_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="TST_r">TST (register)</td>
|
|
<td class="enctags">A1, Shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TST_r_A1_RRX" iformfile="tst_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="TST_r">TST (register)</td>
|
|
<td class="enctags">A1, Rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TEQ_r_A1" iformfile="teq_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="TEQ_r">TEQ (register)</td>
|
|
<td class="enctags">A1, Shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TEQ_r_A1_RRX" iformfile="teq_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="TEQ_r">TEQ (register)</td>
|
|
<td class="enctags">A1, Rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMP_r_A1" iformfile="cmp_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="CMP_r">CMP (register)</td>
|
|
<td class="enctags">A1, Shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMP_r_A1_RRX" iformfile="cmp_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="CMP_r">CMP (register)</td>
|
|
<td class="enctags">A1, Rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMN_r_A1" iformfile="cmn_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="CMN_r">CMN (register)</td>
|
|
<td class="enctags">A1, Shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMN_r_A1_RRX" iformfile="cmn_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="CMN_r">CMN (register)</td>
|
|
<td class="enctags">A1, Rotate right with extend</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="logic3reg_immsh" title="Logical Arithmetic (three register, immediate shift)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="6" width="2" name="stype" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="logic3reg_immsh" cols="4">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="12*" />
|
|
<col colno="3" printwidth="22*" />
|
|
<col colno="4" printwidth="36*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">imm5:stype</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ORRS_r_A1" iformfile="orr_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="ORR_r">ORR, ORRS (register)</td>
|
|
<td class="enctags">A1, ORRS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ORRS_r_A1_RRX" iformfile="orr_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="ORR_r">ORR, ORRS (register)</td>
|
|
<td class="enctags">A1, ORRS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOVS_r_A1" iformfile="mov_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="MOV_r">MOV, MOVS (register)</td>
|
|
<td class="enctags">A1, MOVS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOVS_r_A1_RRX" iformfile="mov_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="MOV_r">MOV, MOVS (register)</td>
|
|
<td class="enctags">A1, MOVS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BICS_r_A1" iformfile="bic_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="BIC_r">BIC, BICS (register)</td>
|
|
<td class="enctags">A1, BICS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BICS_r_A1_RRX" iformfile="bic_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="BIC_r">BIC, BICS (register)</td>
|
|
<td class="enctags">A1, BICS, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVNS_r_A1" iformfile="mvn_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="MVN_r">MVN, MVNS (register)</td>
|
|
<td class="enctags">A1, MVNS, shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVNS_r_A1_RRX" iformfile="mvn_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="MVN_r">MVN, MVNS (register)</td>
|
|
<td class="enctags">A1, MVNS, rotate right with extend</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="dpmisc">Miscellaneous</funcgroupheader>
|
|
<iclass_sect id="bx_reg" title="Branch and Exchange (register)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="bx_reg" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="BX_A1" iformfile="bx.xml" first="t" last="t">
|
|
<td class="iformname" iformid="BX">BX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="bxj_reg" title="Branch and Exchange to Jazelle (register)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="bxj_reg" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="BXJ_A1" iformfile="bxj.xml" first="t" last="t">
|
|
<td class="iformname" iformid="BXJ">BXJ</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="blx_reg" title="Branch with Link and Exchange (register)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="blx_reg" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="BLX_r_A1" iformfile="blx_r.xml" first="t" last="t">
|
|
<td class="iformname" iformid="BLX_r">BLX (register)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="clz" title="Count Leading Zeros">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="clz" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="CLZ_A1" iformfile="clz.xml" first="t" last="t">
|
|
<td class="iformname" iformid="CLZ">CLZ</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="crc32" title="Cyclic Redundancy Check">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="sz" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="9" name="C" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="crc32" cols="4">
|
|
<col colno="1" printwidth="4*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="13*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">sz</th>
|
|
<th class="bitfields">C</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="CRC32B_A1" arch_version="FEAT_CRC32" iformfile="crc32.xml" label="CRC32B" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="CRC32">CRC32</td>
|
|
<td class="enctags">A1, CRC32B</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32CB_A1" arch_version="FEAT_CRC32" iformfile="crc32c.xml" label="CRC32CB" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="CRC32C">CRC32C</td>
|
|
<td class="enctags">A1, CRC32CB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32H_A1" arch_version="FEAT_CRC32" iformfile="crc32.xml" label="CRC32H" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="CRC32">CRC32</td>
|
|
<td class="enctags">A1, CRC32H</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32CH_A1" arch_version="FEAT_CRC32" iformfile="crc32c.xml" label="CRC32CH" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="CRC32C">CRC32C</td>
|
|
<td class="enctags">A1, CRC32CH</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32W_A1" arch_version="FEAT_CRC32" iformfile="crc32.xml" label="CRC32W" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="CRC32">CRC32</td>
|
|
<td class="enctags">A1, CRC32W</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CRC32CW_A1" arch_version="FEAT_CRC32" iformfile="crc32c.xml" label="CRC32CW" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="CRC32C">CRC32C</td>
|
|
<td class="enctags">A1, CRC32CW</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNPREDICTABLE_17_crc32" unpred="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNPREDICTABLE</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="except" title="Exception Generation">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="except" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="HLT_A1" iformfile="hlt.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="HLT">HLT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BKPT_A1" iformfile="bkpt.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="BKPT">BKPT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="HVC_A1" iformfile="hvc.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="HVC">HVC</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMC_A1_AS" iformfile="smc.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="SMC">SMC</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="eret" title="Exception Return">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="eret" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ERET_A1" iformfile="eret.xml" first="t" last="t">
|
|
<td class="iformname" iformid="ERET">ERET</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="intsat" title="Integer Saturating Arithmetic">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="intsat" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="QADD_A1" iformfile="qadd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="QADD">QADD</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QSUB_A1" iformfile="qsub.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="QSUB">QSUB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QDADD_A1" iformfile="qdadd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="QDADD">QDADD</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QDSUB_A1" iformfile="qdsub.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="QDSUB">QDSUB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="movsr_reg" title="Move special register (register)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="mask" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="9" name="B" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="8" name="m" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="movsr_reg" cols="4">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="23*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">B</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MRS_A1_AS" iformfile="mrs.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="MRS">MRS</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MRS_br_A1_AS" iformfile="mrs_br.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="MRS_br">MRS (Banked register)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MSR_r_A1_AS" iformfile="msr_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="MSR_r">MSR (register)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MSR_br_A1_AS" iformfile="msr_br.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="MSR_br">MSR (Banked register)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="dphwm">Halfword multiply and multiply accumulate</funcgroupheader>
|
|
<iclass_sect id="mul_half" title="Halfword Multiply and Accumulate">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Ra" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="6" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="mul_half" cols="5">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="36*" />
|
|
<col colno="5" printwidth="13*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">M</th>
|
|
<th class="bitfields">N</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SMLATT_A1" iformfile="smlabb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="SMLABB">SMLABB, SMLABT, SMLATB, SMLATT</td>
|
|
<td class="enctags">A1, SMLATT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLAWB_A1" iformfile="smlawb.xml" label="SMLAWB" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SMLAWB">SMLAWB, SMLAWT</td>
|
|
<td class="enctags">A1, SMLAWB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULWB_A1" iformfile="smulwb.xml" label="SMULWB" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SMULWB">SMULWB, SMULWT</td>
|
|
<td class="enctags">A1, SMULWB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLAWT_A1" iformfile="smlawb.xml" label="SMLAWT" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SMLAWB">SMLAWB, SMLAWT</td>
|
|
<td class="enctags">A1, SMLAWT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULWT_A1" iformfile="smulwb.xml" label="SMULWT" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SMULWB">SMULWB, SMULWT</td>
|
|
<td class="enctags">A1, SMULWT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLALTT_A1" iformfile="smlalbb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="SMLALBB">SMLALBB, SMLALBT, SMLALTB, SMLALTT</td>
|
|
<td class="enctags">A1, SMLALTT</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULTT_A1" iformfile="smulbb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="SMULBB">SMULBB, SMULBT, SMULTB, SMULTT</td>
|
|
<td class="enctags">A1, SMULTT</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="dpmul">Multiply and multiply accumulate</funcgroupheader>
|
|
<iclass_sect id="mul_word" title="Multiply and Accumulate">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="opc" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="20" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="RdHi" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="RdLo" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="mul_word" cols="4">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">S</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MULS_A1" iformfile="mul.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="MUL">MUL, MULS</td>
|
|
<td class="enctags">A1, Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MLAS_A1" iformfile="mla.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="MLA">MLA, MLAS</td>
|
|
<td class="enctags">A1, Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UMAAL_A1" iformfile="umaal.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="UMAAL">UMAAL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_16_mul_word" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MLS_A1" iformfile="mls.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="MLS">MLS</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_18_mul_word" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UMULLS_A1" iformfile="umull.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="UMULL">UMULL, UMULLS</td>
|
|
<td class="enctags">A1, Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UMLALS_A1" iformfile="umlal.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="UMLAL">UMLAL, UMLALS</td>
|
|
<td class="enctags">A1, Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMULLS_A1" iformfile="smull.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="SMULL">SMULL, SMULLS</td>
|
|
<td class="enctags">A1, Flag setting</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLALS_A1" iformfile="smlal.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="SMLAL">SMLAL, SMLALS</td>
|
|
<td class="enctags">A1, Flag setting</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="sync">Synchronization primitives and Load-Acquire/Store-Release</funcgroupheader>
|
|
<iclass_sect id="ldst_excl" title="Load/Store Exclusive and Load-Acquire/Store-Release">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="xRd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" name="ex" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="8" name="ord" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="xRt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldst_excl" cols="6">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="4*" />
|
|
<col colno="4" printwidth="5*" />
|
|
<col colno="5" printwidth="18*" />
|
|
<col colno="6" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">ex</th>
|
|
<th class="bitfields">ord</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STL_A1" iformfile="stl.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STL">STL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_ldst_excl" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLEX_A1" iformfile="stlex.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STLEX">STLEX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STREX_A1" iformfile="strex.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="STREX">STREX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDA_A1" iformfile="lda.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDA">LDA</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_16_ldst_excl" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAEX_A1" iformfile="ldaex.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDAEX">LDAEX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDREX_A1" iformfile="ldrex.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDREX">LDREX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_19_ldst_excl" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLEXD_A1" iformfile="stlexd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STLEXD">STLEXD</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STREXD_A1" iformfile="strexd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="STREXD">STREXD</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_ldst_excl" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAEXD_A1" iformfile="ldaexd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDAEXD">LDAEXD</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDREXD_A1" iformfile="ldrexd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDREXD">LDREXD</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLB_A1" iformfile="stlb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STLB">STLB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_26_ldst_excl" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLEXB_A1" iformfile="stlexb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STLEXB">STLEXB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STREXB_A1" iformfile="strexb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="STREXB">STREXB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAB_A1" iformfile="ldab.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDAB">LDAB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_30_ldst_excl" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAEXB_A1" iformfile="ldaexb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDAEXB">LDAEXB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDREXB_A1" iformfile="ldrexb.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDREXB">LDREXB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLH_A1" iformfile="stlh.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STLH">STLH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_34_ldst_excl" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STLEXH_A1" iformfile="stlexh.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STLEXH">STLEXH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STREXH_A1" iformfile="strexh.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="STREXH">STREXH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAH_A1" iformfile="ldah.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDAH">LDAH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_38_ldst_excl" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDAEXH_A1" iformfile="ldaexh.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDAEXH">LDAEXH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDREXH_A1" iformfile="ldrexh.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDREXH">LDREXH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="xldst">Extra load/store</funcgroupheader>
|
|
<iclass_sect id="ldstximm" title="Load/Store Dual, Half, Signed Byte (immediate, literal)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="imm4H" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="6" width="2" name="op2" usename="1" settings="2" constraint="!= 00">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="imm4L" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="op2" op="!=" val="00" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="op2" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstximm" cols="6">
|
|
<col colno="1" printwidth="7*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="5*" />
|
|
<col colno="5" printwidth="19*" />
|
|
<col colno="6" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">P:W</th>
|
|
<th class="bitfields">o1</th>
|
|
<th class="bitfields">Rn</th>
|
|
<th class="bitfields">op2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDRD_l_A1" iformfile="ldrd_l.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRD_l">LDRD (literal)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_l_A1" iformfile="ldrh_l.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRH_l">LDRH (literal)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSB_l_A1" iformfile="ldrsb_l.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRSB_l">LDRSB (literal)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_l_A1" iformfile="ldrsh_l.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="LDRSH_l">LDRSH (literal)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRD_i_A1_post" iformfile="ldrd_i.xml" label="post-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRD_i">LDRD (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRH_i_A1_post" iformfile="strh_i.xml" label="post-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="STRH_i">STRH (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRD_i_A1_post" iformfile="strd_i.xml" label="post-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="STRD_i">STRD (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_i_A1_post" iformfile="ldrh_i.xml" label="post-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRH_i">LDRH (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSB_i_A1_post" iformfile="ldrsb_i.xml" label="post-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRSB_i">LDRSB (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_i_A1_post" iformfile="ldrsh_i.xml" label="post-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="LDRSH_i">LDRSH (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_16_ldstximm" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRHT_A1" iformfile="strht.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="STRHT">STRHT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_ldstximm" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRHT_A1" iformfile="ldrht.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRHT">LDRHT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSBT_A1" iformfile="ldrsbt.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRSBT">LDRSBT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSHT_A1" iformfile="ldrsht.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="LDRSHT">LDRSHT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRD_i_A1_off" iformfile="ldrd_i.xml" label="offset" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRD_i">LDRD (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRH_i_A1_off" iformfile="strh_i.xml" label="offset" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="STRH_i">STRH (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRD_i_A1_off" iformfile="strd_i.xml" label="offset" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="STRD_i">STRD (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_i_A1_off" iformfile="ldrh_i.xml" label="offset" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRH_i">LDRH (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSB_i_A1_off" iformfile="ldrsb_i.xml" label="offset" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRSB_i">LDRSB (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_i_A1_off" iformfile="ldrsh_i.xml" label="offset" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="LDRSH_i">LDRSH (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRD_i_A1_pre" iformfile="ldrd_i.xml" label="pre-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRD_i">LDRD (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRH_i_A1_pre" iformfile="strh_i.xml" label="pre-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="STRH_i">STRH (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRD_i_A1_pre" iformfile="strd_i.xml" label="pre-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="STRD_i">STRD (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_i_A1_pre" iformfile="ldrh_i.xml" label="pre-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRH_i">LDRH (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSB_i_A1_pre" iformfile="ldrsb_i.xml" label="pre-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRSB_i">LDRSB (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_i_A1_pre" iformfile="ldrsh_i.xml" label="pre-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="LDRSH_i">LDRSH (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstxreg" title="Load/Store Dual, Half, Signed Byte (register)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="6" width="2" name="op2" usename="1" settings="2" constraint="!= 00">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="op2" op="!=" val="00" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="op2" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstxreg" cols="6">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="4*" />
|
|
<col colno="4" printwidth="5*" />
|
|
<col colno="5" printwidth="18*" />
|
|
<col colno="6" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">P</th>
|
|
<th class="bitfields">W</th>
|
|
<th class="bitfields">o1</th>
|
|
<th class="bitfields">op2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STRH_r_A1_post" iformfile="strh_r.xml" label="post-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="STRH_r">STRH (register)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRD_r_A1_post" iformfile="ldrd_r.xml" label="post-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRD_r">LDRD (register)</td>
|
|
<td class="enctags">Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRD_r_A1_post" iformfile="strd_r.xml" label="post-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="STRD_r">STRD (register)</td>
|
|
<td class="enctags">Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_r_A1_post" iformfile="ldrh_r.xml" label="post-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRH_r">LDRH (register)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSB_r_A1_post" iformfile="ldrsb_r.xml" label="post-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRSB_r">LDRSB (register)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_r_A1_post" iformfile="ldrsh_r.xml" label="post-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="LDRSH_r">LDRSH (register)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRHT_A2" iformfile="strht.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="STRHT">STRHT</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_16_ldstxreg" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_ldstxreg" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRHT_A2" iformfile="ldrht.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRHT">LDRHT</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSBT_A2" iformfile="ldrsbt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRSBT">LDRSBT</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSHT_A2" iformfile="ldrsht.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="LDRSHT">LDRSHT</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRH_r_A1_pre" iformfile="strh_r.xml" label="pre-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="STRH_r">STRH (register)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRD_r_A1_pre" iformfile="ldrd_r.xml" label="pre-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRD_r">LDRD (register)</td>
|
|
<td class="enctags">Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRD_r_A1_pre" iformfile="strd_r.xml" label="pre-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="STRD_r">STRD (register)</td>
|
|
<td class="enctags">Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRH_r_A1_pre" iformfile="ldrh_r.xml" label="pre-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="LDRH_r">LDRH (register)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSB_r_A1_pre" iformfile="ldrsb_r.xml" label="pre-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="LDRSB_r">LDRSB (register)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRSH_r_A1_pre" iformfile="ldrsh_r.xml" label="pre-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="LDRSH_r">LDRSH (register)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="dpimm">Data-processing immediate</funcgroupheader>
|
|
<iclass_sect id="intdp2reg_imm" title="Integer Data Processing (two register and immediate)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="opc" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="20" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="intdp2reg_imm" cols="5">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="32*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">S</th>
|
|
<th class="bitfields">Rn</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ANDS_i_A1" iformfile="and_i.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="AND_i">AND, ANDS (immediate)</td>
|
|
<td class="enctags">A1, ANDS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="EORS_i_A1" iformfile="eor_i.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="EOR_i">EOR, EORS (immediate)</td>
|
|
<td class="enctags">A1, EORS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_i_A1" iformfile="sub_i.xml" label="SUB" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="SUB_i">SUB, SUBS (immediate)</td>
|
|
<td class="enctags">A1, SUB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUB_SP_i_A1" iformfile="sub_sp_i.xml" label="SUB" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="SUB_SP_i">SUB, SUBS (SP minus immediate)</td>
|
|
<td class="enctags">A1, SUB</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a2" iformfile="adr.xml" label="A2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="ADR">ADR</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_i_A1" iformfile="sub_i.xml" label="SUBS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td class="iformname" iformid="SUB_i">SUB, SUBS (immediate)</td>
|
|
<td class="enctags">A1, SUBS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SUBS_SP_i_A1" iformfile="sub_sp_i.xml" label="SUBS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="SUB_SP_i">SUB, SUBS (SP minus immediate)</td>
|
|
<td class="enctags">A1, SUBS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSBS_i_A1" iformfile="rsb_i.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="RSB_i">RSB, RSBS (immediate)</td>
|
|
<td class="enctags">A1, RSBS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_i_A1" iformfile="add_i.xml" label="ADD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="ADD_i">ADD, ADDS (immediate)</td>
|
|
<td class="enctags">A1, ADD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADD_SP_i_A1" iformfile="add_sp_i.xml" label="ADD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="ADD_SP_i">ADD, ADDS (SP plus immediate)</td>
|
|
<td class="enctags">A1, ADD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a1" iformfile="adr.xml" label="A1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="ADR">ADR</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_i_A1" iformfile="add_i.xml" label="ADDS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1101</td>
|
|
<td class="iformname" iformid="ADD_i">ADD, ADDS (immediate)</td>
|
|
<td class="enctags">A1, ADDS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADDS_SP_i_A1" iformfile="add_sp_i.xml" label="ADDS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="ADD_SP_i">ADD, ADDS (SP plus immediate)</td>
|
|
<td class="enctags">A1, ADDS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ADCS_i_A1" iformfile="adc_i.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ADC_i">ADC, ADCS (immediate)</td>
|
|
<td class="enctags">A1, ADCS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SBCS_i_A1" iformfile="sbc_i.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SBC_i">SBC, SBCS (immediate)</td>
|
|
<td class="enctags">A1, SBCS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RSCS_i_A1" iformfile="rsc_i.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="RSC_i">RSC, RSCS (immediate)</td>
|
|
<td class="enctags">RSCS</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="intdp1reg_imm" title="Integer Test and Compare (one register and immediate)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="intdp1reg_imm" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="TST_i_A1" iformfile="tst_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="TST_i">TST (immediate)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TEQ_i_A1" iformfile="teq_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="TEQ_i">TEQ (immediate)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMP_i_A1" iformfile="cmp_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="CMP_i">CMP (immediate)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CMN_i_A1" iformfile="cmn_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="CMN_i">CMN (immediate)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="log2reg_imm" title="Logical Arithmetic (two register and immediate)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" width="2" name="opc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="20" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="log2reg_imm" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="23*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="ORRS_i_A1" iformfile="orr_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="ORR_i">ORR, ORRS (immediate)</td>
|
|
<td class="enctags">A1, ORRS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOVS_i_A1" iformfile="mov_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="MOV_i">MOV, MOVS (immediate)</td>
|
|
<td class="enctags">A1, MOVS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BICS_i_A1" iformfile="bic_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="BIC_i">BIC, BICS (immediate)</td>
|
|
<td class="enctags">A1, BICS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MVNS_i_A1" iformfile="mvn_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="MVN_i">MVN, MVNS (immediate)</td>
|
|
<td class="enctags">A1, MVNS</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="movw" title="Move Halfword (immediate)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="H" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="movw" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="23*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">H</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MOV_i_A2" iformfile="mov_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="MOV_i">MOV, MOVS (immediate)</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MOVT_A1" iformfile="movt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="MOVT">MOVT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="movsr_hint_imm" title="Move Special Register and Hints (immediate)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="R" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="movsr_hint_imm" cols="4">
|
|
<col colno="1" printwidth="10*" />
|
|
<col colno="2" printwidth="14*" />
|
|
<col colno="3" printwidth="31*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">R:imm4</th>
|
|
<th class="bitfields">imm12</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MSR_i_A1_AS" iformfile="msr_i.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">!= 00000</td>
|
|
<td bitwidth="12" class="bitfield"></td>
|
|
<td class="iformname" iformid="MSR_i">MSR (immediate)</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="NOP_A1" iformfile="nop.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00000000</td>
|
|
<td class="iformname" iformid="NOP">NOP</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="YIELD_A1" iformfile="yield.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00000001</td>
|
|
<td class="iformname" iformid="YIELD">YIELD</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="WFE_A1" iformfile="wfe.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00000010</td>
|
|
<td class="iformname" iformid="WFE">WFE</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="WFI_A1" iformfile="wfi.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00000011</td>
|
|
<td class="iformname" iformid="WFI">WFI</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SEV_A1" iformfile="sev.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00000100</td>
|
|
<td class="iformname" iformid="SEV">SEV</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SEVL_A1" iformfile="sevl.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00000101</td>
|
|
<td class="iformname" iformid="SEVL">SEVL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_18_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx0000011x</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_19_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00001xxx</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ESB_A1" arch_version="FEAT_RAS" iformfile="esb.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00010000</td>
|
|
<td class="iformname" iformid="ESB">ESB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_21_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00010001</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="TSB_A1" arch_version="FEAT_TRF" iformfile="tsb.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00010010</td>
|
|
<td class="iformname" iformid="TSB">TSB CSYNC</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_23_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00010011</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CSDB_A1" iformfile="csdb.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00010100</td>
|
|
<td class="iformname" iformid="CSDB">CSDB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_25_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00010101</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CLRBHB_A1" arch_version="FEAT_CLRBHB" iformfile="clrbhb.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00010110</td>
|
|
<td class="iformname" iformid="CLRBHB">CLRBHB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_27_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00010111</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_28_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx00011xxx</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_29_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx001xxxxx</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_30_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx01xxxxxx</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_31_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx10xxxxxx</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_32_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx110xxxxx</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_33_movsr_hint_imm" reserved_nop_hint="1" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx1110xxxx</td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="DBG_A1" iformfile="dbg.xml" first="t" last="t">
|
|
<td bitwidth="7" class="bitfield">00000</td>
|
|
<td bitwidth="12" class="bitfield">xxxx1111xxxx</td>
|
|
<td class="iformname" iformid="DBG">DBG</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="ldstwbi">Load/store word and unsigned byte (immediate)</funcgroupheader>
|
|
<iclass_sect id="ldstimm" title="Load/Store Word, Unsigned Byte (immediate, literal)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="o2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstimm" cols="6">
|
|
<col colno="1" printwidth="7*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="4*" />
|
|
<col colno="4" printwidth="9*" />
|
|
<col colno="5" printwidth="18*" />
|
|
<col colno="6" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">P:W</th>
|
|
<th class="bitfields">o2</th>
|
|
<th class="bitfields">o1</th>
|
|
<th class="bitfields">Rn</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="LDR_l_A1" iformfile="ldr_l.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="LDR_l">LDR (literal)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_l_A1" iformfile="ldrb_l.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="LDRB_l">LDRB (literal)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STR_i_A1_post" iformfile="str_i.xml" label="post-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STR_i">STR (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_i_A1_post" iformfile="ldr_i.xml" label="post-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDR_i">LDR (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRB_i_A1_post" iformfile="strb_i.xml" label="post-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRB_i">STRB (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_i_A1_post" iformfile="ldrb_i.xml" label="post-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRB_i">LDRB (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRT_A1" iformfile="strt.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRT">STRT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRT_A1" iformfile="ldrt.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="LDRT">LDRT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRBT_A1" iformfile="strbt.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRBT">STRBT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRBT_A1" iformfile="ldrbt.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="LDRBT">LDRBT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STR_i_A1_off" iformfile="str_i.xml" label="offset" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STR_i">STR (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_i_A1_off" iformfile="ldr_i.xml" label="offset" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDR_i">LDR (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRB_i_A1_off" iformfile="strb_i.xml" label="offset" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRB_i">STRB (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_i_A1_off" iformfile="ldrb_i.xml" label="offset" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRB_i">LDRB (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STR_i_A1_pre" iformfile="str_i.xml" label="pre-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STR_i">STR (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_i_A1_pre" iformfile="ldr_i.xml" label="pre-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDR_i">LDR (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRB_i_A1_pre" iformfile="strb_i.xml" label="pre-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="STRB_i">STRB (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_i_A1_pre" iformfile="ldrb_i.xml" label="pre-indexed" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="LDRB_i">LDRB (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="ldstwbr">Load/store word and unsigned byte (register)</funcgroupheader>
|
|
<iclass_sect id="ldstreg" title="Load/Store Word, Unsigned Byte (register)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="o2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="6" width="2" name="stype" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstreg" cols="6">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="4*" />
|
|
<col colno="5" printwidth="18*" />
|
|
<col colno="6" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">P</th>
|
|
<th class="bitfields">o2</th>
|
|
<th class="bitfields">W</th>
|
|
<th class="bitfields">o1</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STR_r_A1_post" iformfile="str_r.xml" label="post-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STR_r">STR (register)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_r_A1_post" iformfile="ldr_r.xml" label="post-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDR_r">LDR (register)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRT_A2" iformfile="strt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRT">STRT</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRT_A2" iformfile="ldrt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRT">LDRT</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRB_r_A1_post" iformfile="strb_r.xml" label="post-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRB_r">STRB (register)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_r_A1_post" iformfile="ldrb_r.xml" label="post-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRB_r">LDRB (register)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRBT_A2" iformfile="strbt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRBT">STRBT</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRBT_A2" iformfile="ldrbt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRBT">LDRBT</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STR_r_A1_pre" iformfile="str_r.xml" label="pre-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STR_r">STR (register)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDR_r_A1_pre" iformfile="ldr_r.xml" label="pre-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDR_r">LDR (register)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STRB_r_A1_pre" iformfile="strb_r.xml" label="pre-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STRB_r">STRB (register)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDRB_r_A1_pre" iformfile="ldrb_r.xml" label="pre-indexed" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="LDRB_r">LDRB (register)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="media">Media instructions</funcgroupheader>
|
|
<iclass_sect id="bfx" title="Bitfield Extract">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" width="5" name="widthm1" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="5" name="lsb" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="6" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="bfx" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SBFX_A1" iformfile="sbfx.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SBFX">SBFX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UBFX_A1" iformfile="ubfx.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="UBFX">UBFX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="bfi" title="Bitfield Insert">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="7" settings="7">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" width="5" name="msb" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="5" name="lsb" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="6" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="bfi" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">Rn</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="BFI_A1" iformfile="bfi.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="BFI">BFI</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="BFC_A1" iformfile="bfc.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="BFC">BFC</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="extend" title="Extend and Add">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" name="rotate" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="extend" cols="5">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">op</th>
|
|
<th class="bitfields">Rn</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SXTAB16_A1" iformfile="sxtab16.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SXTAB16">SXTAB16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTB16_A1" iformfile="sxtb16.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="SXTB16">SXTB16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTAB_A1" iformfile="sxtab.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SXTAB">SXTAB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTB_A1" iformfile="sxtb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="SXTB">SXTB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTAH_A1" iformfile="sxtah.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="SXTAH">SXTAH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SXTH_A1" iformfile="sxth.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="SXTH">SXTH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTAB16_A1" iformfile="uxtab16.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="UXTAB16">UXTAB16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTB16_A1" iformfile="uxtb16.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="UXTB16">UXTB16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTAB_A1" iformfile="uxtab.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="UXTAB">UXTAB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTB_A1" iformfile="uxtb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="UXTB">UXTB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTAH_A1" iformfile="uxtah.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="UXTAH">UXTAH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UXTH_A1" iformfile="uxth.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="UXTH">UXTH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="pack" title="Pack Halfword">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="6" name="tb" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="pack" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="11*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="PKHTB_A1" iformfile="pkh.xml" first="t" last="t">
|
|
<td class="iformname" iformid="PKH">PKHBT, PKHTB</td>
|
|
<td class="enctags">A1, PKHTB</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="parallel" title="Parallel Arithmetic">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="3" name="op1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" name="B" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" width="2" name="op2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="parallel" cols="5">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="5*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">B</th>
|
|
<th class="bitfields">op2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SADD16_A1" iformfile="sadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SADD16">SADD16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SASX_A1" iformfile="sasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SASX">SASX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SSAX_A1" iformfile="ssax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="SSAX">SSAX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SSUB16_A1" iformfile="ssub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="SSUB16">SSUB16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SADD8_A1" iformfile="sadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SADD8">SADD8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_18_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SSUB8_A1" iformfile="ssub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="SSUB8">SSUB8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QADD16_A1" iformfile="qadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="QADD16">QADD16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QASX_A1" iformfile="qasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="QASX">QASX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QSAX_A1" iformfile="qsax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="QSAX">QSAX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QSUB16_A1" iformfile="qsub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="QSUB16">QSUB16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QADD8_A1" iformfile="qadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="QADD8">QADD8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_25_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_26_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="QSUB8_A1" iformfile="qsub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="QSUB8">QSUB8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHADD16_A1" iformfile="shadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SHADD16">SHADD16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHASX_A1" iformfile="shasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="SHASX">SHASX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHSAX_A1" iformfile="shsax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="SHSAX">SHSAX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHSUB16_A1" iformfile="shsub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="SHSUB16">SHSUB16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHADD8_A1" iformfile="shadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="SHADD8">SHADD8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_33_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_34_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHSUB8_A1" iformfile="shsub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="SHSUB8">SHSUB8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_36_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UADD16_A1" iformfile="uadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="UADD16">UADD16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UASX_A1" iformfile="uasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="UASX">UASX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USAX_A1" iformfile="usax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="USAX">USAX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USUB16_A1" iformfile="usub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="USUB16">USUB16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UADD8_A1" iformfile="uadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="UADD8">UADD8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_42_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_43_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USUB8_A1" iformfile="usub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="USUB8">USUB8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQADD16_A1" iformfile="uqadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="UQADD16">UQADD16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQASX_A1" iformfile="uqasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="UQASX">UQASX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQSAX_A1" iformfile="uqsax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="UQSAX">UQSAX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQSUB16_A1" iformfile="uqsub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="UQSUB16">UQSUB16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQADD8_A1" iformfile="uqadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="UQADD8">UQADD8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_50_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_51_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UQSUB8_A1" iformfile="uqsub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="UQSUB8">UQSUB8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHADD16_A1" iformfile="uhadd16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="UHADD16">UHADD16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHASX_A1" iformfile="uhasx.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="UHASX">UHASX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHSAX_A1" iformfile="uhsax.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="UHSAX">UHSAX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHSUB16_A1" iformfile="uhsub16.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="UHSUB16">UHSUB16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHADD8_A1" iformfile="uhadd8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname" iformid="UHADD8">UHADD8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_58_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_59_parallel" undef="1" oneofthismnem="14" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UHSUB8_A1" iformfile="uhsub8.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="UHSUB8">UHSUB8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="udf" title="Permanently UNDEFINED">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="udf" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">cond</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_udf" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0xxx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_udf" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10xx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_udf" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UDF_A1" iformfile="udf.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td class="iformname" iformid="UDF">UDF</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="reverse" title="Reverse Bit/Byte">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" name="o2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="reverse" cols="4">
|
|
<col colno="1" printwidth="4*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">o1</th>
|
|
<th class="bitfields">o2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="REV_A1" iformfile="rev.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="REV">REV</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="REV16_A1" iformfile="rev16.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="REV16">REV16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RBIT_A1" iformfile="rbit.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="RBIT">RBIT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="REVSH_A1" iformfile="revsh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="REVSH">REVSH</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="sat16" title="Saturate 16-bit">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="sat_imm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="sat16" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SSAT16_A1" iformfile="ssat16.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SSAT16">SSAT16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USAT16_A1" iformfile="usat16.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="USAT16">USAT16</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="sat32" title="Saturate 32-bit">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" width="5" name="sat_imm" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="6" name="sh" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="sat32" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="28*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SSAT_A1_ASR" iformfile="ssat.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SSAT">SSAT</td>
|
|
<td class="enctags">A1, Arithmetic shift right</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USAT_A1_ASR" iformfile="usat.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="USAT">USAT</td>
|
|
<td class="enctags">A1, Arithmetic shift right</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="selbytes" title="Select Bytes">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="selbytes" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SEL_A1" iformfile="sel.xml" first="t" last="t">
|
|
<td class="iformname" iformid="SEL">SEL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="smul_div" title="Signed multiply, Divide">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" width="3" name="op1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Ra" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="3" name="op2" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="smul_div" cols="5">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="8*" />
|
|
<col colno="4" printwidth="18*" />
|
|
<col colno="5" printwidth="13*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">Ra</th>
|
|
<th class="bitfields">op2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SMLAD_A1" iformfile="smlad.xml" label="SMLAD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td class="iformname" iformid="SMLAD">SMLAD, SMLADX</td>
|
|
<td class="enctags">A1, SMLAD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLADX_A1" iformfile="smlad.xml" label="SMLADX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td class="iformname" iformid="SMLAD">SMLAD, SMLADX</td>
|
|
<td class="enctags">A1, SMLADX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLSD_A1" iformfile="smlsd.xml" label="SMLSD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td class="iformname" iformid="SMLSD">SMLSD, SMLSDX</td>
|
|
<td class="enctags">A1, SMLSD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLSDX_A1" iformfile="smlsd.xml" label="SMLSDX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td class="iformname" iformid="SMLSD">SMLSD, SMLSDX</td>
|
|
<td class="enctags">A1, SMLSDX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_19_smul_div" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">1xx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMUAD_A1" iformfile="smuad.xml" label="SMUAD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td class="iformname" iformid="SMUAD">SMUAD, SMUADX</td>
|
|
<td class="enctags">A1, SMUAD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMUADX_A1" iformfile="smuad.xml" label="SMUADX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td class="iformname" iformid="SMUAD">SMUAD, SMUADX</td>
|
|
<td class="enctags">A1, SMUADX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMUSD_A1" iformfile="smusd.xml" label="SMUSD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td class="iformname" iformid="SMUSD">SMUSD, SMUSDX</td>
|
|
<td class="enctags">A1, SMUSD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMUSDX_A1" iformfile="smusd.xml" label="SMUSDX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td class="iformname" iformid="SMUSD">SMUSD, SMUSDX</td>
|
|
<td class="enctags">A1, SMUSDX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SDIV_A1" iformfile="sdiv.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td class="iformname" iformid="SDIV">SDIV</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_smul_div" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">!= 000</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_smul_div" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UDIV_A1" iformfile="udiv.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td class="iformname" iformid="UDIV">UDIV</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_24_smul_div" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">!= 000</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLALD_A1" iformfile="smlald.xml" label="SMLALD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td class="iformname" iformid="SMLALD">SMLALD, SMLALDX</td>
|
|
<td class="enctags">A1, SMLALD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLALDX_A1" iformfile="smlald.xml" label="SMLALDX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td class="iformname" iformid="SMLALD">SMLALD, SMLALDX</td>
|
|
<td class="enctags">A1, SMLALDX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLSLD_A1" iformfile="smlsld.xml" label="SMLSLD" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td class="iformname" iformid="SMLSLD">SMLSLD, SMLSLDX</td>
|
|
<td class="enctags">A1, SMLSLD</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMLSLDX_A1" iformfile="smlsld.xml" label="SMLSLDX" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td class="iformname" iformid="SMLSLD">SMLSLD, SMLSLDX</td>
|
|
<td class="enctags">A1, SMLSLDX</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_29_smul_div" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">1xx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMLA_A1" iformfile="smmla.xml" label="SMMLA" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td class="iformname" iformid="SMMLA">SMMLA, SMMLAR</td>
|
|
<td class="enctags">A1, SMMLA</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMLAR_A1" iformfile="smmla.xml" label="SMMLAR" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td class="iformname" iformid="SMMLA">SMMLA, SMMLAR</td>
|
|
<td class="enctags">A1, SMMLAR</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_34_smul_div" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">01x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_35_smul_div" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">10x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMLS_A1" iformfile="smmls.xml" label="SMMLS" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td class="iformname" iformid="SMMLS">SMMLS, SMMLSR</td>
|
|
<td class="enctags">A1, SMMLS</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMLSR_A1" iformfile="smmls.xml" label="SMMLSR" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td class="iformname" iformid="SMMLS">SMMLS, SMMLSR</td>
|
|
<td class="enctags">A1, SMMLSR</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMUL_A1" iformfile="smmul.xml" label="SMMUL" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td class="iformname" iformid="SMMUL">SMMUL, SMMULR</td>
|
|
<td class="enctags">A1, SMMUL</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SMMULR_A1" iformfile="smmul.xml" label="SMMULR" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td class="iformname" iformid="SMMUL">SMMUL, SMMULR</td>
|
|
<td class="enctags">A1, SMMULR</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_38_smul_div" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">11x</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="usad" title="Unsigned Sum of Absolute Differences">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="8" settings="8">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Ra" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="usad" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">Ra</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="USADA8_A1" iformfile="usada8.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="USADA8">USADA8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="USAD8_A1" iformfile="usad8.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="USAD8">USAD8</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="brblk">Branch, branch with link, and block data transfer</funcgroupheader>
|
|
<iclass_sect id="b_imm" title="Branch (immediate)">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="4" name="cond" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="27" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" name="H" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" width="24" name="imm24" usename="1">
|
|
<c colspan="24"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="b_imm" cols="4">
|
|
<col colno="1" printwidth="9*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="21*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">cond</th>
|
|
<th class="bitfields">H</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="B_A1" iformfile="b.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="B">B</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a1" iformfile="bl_i.xml" label="A1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="BL_i">BL, BLX (immediate)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a2" iformfile="bl_i.xml" label="A2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="BL_i">BL, BLX (immediate)</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstexcept" title="Exception Save/Restore">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="S" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="11" name="op" usename="1">
|
|
<c colspan="11"></c>
|
|
</box>
|
|
<box hibit="4" width="5" name="mode" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldstexcept" cols="6">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="33*" />
|
|
<col colno="6" printwidth="22*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">P</th>
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">S</th>
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_ldstexcept" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RFEDA_A1_AS" iformfile="rfe.xml" label="Decrement After" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="RFE">RFE, RFEDA, RFEDB, RFEIA, RFEIB</td>
|
|
<td class="enctags">A1, Decrement After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SRSDA_A1_AS" iformfile="srs.xml" label="Decrement After" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SRS">SRS, SRSDA, SRSDB, SRSIA, SRSIB</td>
|
|
<td class="enctags">A1, Decrement After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RFEIA_A1_AS" iformfile="rfe.xml" label="Increment After" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="RFE">RFE, RFEDA, RFEDB, RFEIA, RFEIB</td>
|
|
<td class="enctags">A1, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SRSIA_A1_AS" iformfile="srs.xml" label="Increment After" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SRS">SRS, SRSDA, SRSDB, SRSIA, SRSIB</td>
|
|
<td class="enctags">A1, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RFEDB_A1_AS" iformfile="rfe.xml" label="Decrement Before" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="RFE">RFE, RFEDA, RFEDB, RFEIA, RFEIB</td>
|
|
<td class="enctags">A1, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SRSDB_A1_AS" iformfile="srs.xml" label="Decrement Before" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SRS">SRS, SRSDA, SRSDB, SRSIA, SRSIB</td>
|
|
<td class="enctags">A1, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_ldstexcept" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="RFEIB_A1_AS" iformfile="rfe.xml" label="Increment Before" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="RFE">RFE, RFEDA, RFEDB, RFEIA, RFEIB</td>
|
|
<td class="enctags">A1, Increment Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SRSIB_A1_AS" iformfile="srs.xml" label="Increment Before" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SRS">SRS, SRSDA, SRSDB, SRSIA, SRSIB</td>
|
|
<td class="enctags">A1, Increment Before</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstm" title="Load/Store Multiple">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="16" name="register_list" usename="1">
|
|
<c colspan="16"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstm" cols="7">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="4*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="18*" />
|
|
<col colno="6" printwidth="24*" />
|
|
<col colno="7" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="5">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">P</th>
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">op</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">register_list</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="STMDA_A1" iformfile="stmda.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="16" class="bitfield"></td>
|
|
<td class="iformname" iformid="STMDA">STMDA, STMED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDMDA_A1" iformfile="ldmda.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="16" class="bitfield"></td>
|
|
<td class="iformname" iformid="LDMDA">LDMDA, LDMFA</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STM_A1" iformfile="stm.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="16" class="bitfield"></td>
|
|
<td class="iformname" iformid="STM">STM, STMIA, STMEA</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDM_A1" iformfile="ldm.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="16" class="bitfield"></td>
|
|
<td class="iformname" iformid="LDM">LDM, LDMIA, LDMFD</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STM_u_A1_AS" iformfile="stm_u.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="16" class="bitfield"></td>
|
|
<td class="iformname" iformid="STM_u">STM (User registers)</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STMDB_A1" iformfile="stmdb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="16" class="bitfield"></td>
|
|
<td class="iformname" iformid="STMDB">STMDB, STMFD</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDMDB_A1" iformfile="ldmdb.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="16" class="bitfield"></td>
|
|
<td class="iformname" iformid="LDMDB">LDMDB, LDMEA</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDM_u_A1_AS" iformfile="ldm_u.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="16" class="bitfield">0xxxxxxxxxxxxxxx</td>
|
|
<td class="iformname" iformid="LDM_u">LDM (User registers)</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STMIB_A1" iformfile="stmib.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="16" class="bitfield"></td>
|
|
<td class="iformname" iformid="STMIB">STMIB, STMFA</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDMIB_A1" iformfile="ldmib.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="16" class="bitfield"></td>
|
|
<td class="iformname" iformid="LDMIB">LDMIB, LDMED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDM_e_A1_AS" iformfile="ldm_e.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="16" class="bitfield">1xxxxxxxxxxxxxxx</td>
|
|
<td class="iformname" iformid="LDM_e">LDM (exception return)</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="fpdp">Floating-point data-processing</funcgroupheader>
|
|
<iclass_sect id="fpdp3reg" title="Floating-point data-processing (three registers)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="o0" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="o1" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="o2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="o0:D:o1" op="!=" val="1x11" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fpdp3reg" cols="5">
|
|
<col colno="1" printwidth="8*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="4*" />
|
|
<col colno="4" printwidth="23*" />
|
|
<col colno="5" printwidth="29*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">o0:o1</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">o2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_fpdp3reg" undef="1" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 111</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLA_f_A2_H" arch_version="FEAT_FP16" iformfile="vmla_f.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMLA_f">VMLA (floating-point)</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_f_A2_H" arch_version="FEAT_FP16" iformfile="vmls_f.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMLS_f">VMLS (floating-point)</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLA_f_A2_S" iformfile="vmla_f.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMLA_f">VMLA (floating-point)</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_f_A2_S" iformfile="vmls_f.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMLS_f">VMLS (floating-point)</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLA_f_A2_D" iformfile="vmla_f.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMLA_f">VMLA (floating-point)</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_f_A2_D" iformfile="vmls_f.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMLS_f">VMLS (floating-point)</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLS_A1_H" arch_version="FEAT_FP16" iformfile="vnmls.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNMLS">VNMLS</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLA_A1_H" arch_version="FEAT_FP16" iformfile="vnmla.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMLA">VNMLA</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLS_A1_S" iformfile="vnmls.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNMLS">VNMLS</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLA_A1_S" iformfile="vnmla.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMLA">VNMLA</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLS_A1_D" iformfile="vnmls.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNMLS">VNMLS</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMLA_A1_D" iformfile="vnmla.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMLA">VNMLA</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_f_A2_H" arch_version="FEAT_FP16" iformfile="vmul_f.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMUL_f">VMUL (floating-point)</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMUL_A1_H" arch_version="FEAT_FP16" iformfile="vnmul.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMUL">VNMUL</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_f_A2_S" iformfile="vmul_f.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMUL_f">VMUL (floating-point)</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMUL_A1_S" iformfile="vnmul.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMUL">VNMUL</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_f_A2_D" iformfile="vmul_f.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMUL_f">VMUL (floating-point)</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNMUL_A1_D" iformfile="vnmul.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VNMUL">VNMUL</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADD_f_A2_H" arch_version="FEAT_FP16" iformfile="vadd_f.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VADD_f">VADD (floating-point)</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUB_f_A2_H" arch_version="FEAT_FP16" iformfile="vsub_f.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSUB_f">VSUB (floating-point)</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADD_f_A2_S" iformfile="vadd_f.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VADD_f">VADD (floating-point)</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUB_f_A2_S" iformfile="vsub_f.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSUB_f">VSUB (floating-point)</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADD_f_A2_D" iformfile="vadd_f.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VADD_f">VADD (floating-point)</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUB_f_A2_D" iformfile="vsub_f.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSUB_f">VSUB (floating-point)</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDIV_A1_H" arch_version="FEAT_FP16" iformfile="vdiv.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDIV">VDIV</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDIV_A1_S" iformfile="vdiv.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDIV">VDIV</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDIV_A1_D" iformfile="vdiv.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDIV">VDIV</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMS_A1_H" arch_version="FEAT_FP16" iformfile="vfnms.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFNMS">VFNMS</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMA_A1_H" arch_version="FEAT_FP16" iformfile="vfnma.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFNMA">VFNMA</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMS_A1_S" iformfile="vfnms.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFNMS">VFNMS</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMA_A1_S" iformfile="vfnma.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFNMA">VFNMA</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMS_A1_D" iformfile="vfnms.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFNMS">VFNMS</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFNMA_A1_D" iformfile="vfnma.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFNMA">VFNMA</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMA_A2_H" arch_version="FEAT_FP16" iformfile="vfma.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFMA">VFMA</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMS_A2_H" arch_version="FEAT_FP16" iformfile="vfms.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMS">VFMS</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMA_A2_S" iformfile="vfma.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFMA">VFMA</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMS_A2_S" iformfile="vfms.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMS">VFMS</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMA_A2_D" iformfile="vfma.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VFMA">VFMA</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMS_A2_D" iformfile="vfms.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMS">VFMS</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fpdp2reg" title="Floating-point data-processing (two registers)">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="opc2" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" name="o3" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fpdp2reg" cols="6">
|
|
<col colno="1" printwidth="4*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="6*" />
|
|
<col colno="4" printwidth="4*" />
|
|
<col colno="5" printwidth="63*" />
|
|
<col colno="6" printwidth="42*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">o1</th>
|
|
<th class="bitfields">opc2</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">o3</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_fpdp2reg" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_fpdp2reg" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABS_A2_H" arch_version="FEAT_FP16" iformfile="vabs.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VABS">VABS</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_r_A2_S" iformfile="vmov_r.xml" label="single-precision scalar" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOV_r">VMOV (register)</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABS_A2_S" iformfile="vabs.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VABS">VABS</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_r_A2_D" iformfile="vmov_r.xml" label="double-precision scalar" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOV_r">VMOV (register)</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABS_A2_D" iformfile="vabs.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VABS">VABS</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNEG_A2_H" arch_version="FEAT_FP16" iformfile="vneg.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNEG">VNEG</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSQRT_A1_H" arch_version="FEAT_FP16" iformfile="vsqrt.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSQRT">VSQRT</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNEG_A2_S" iformfile="vneg.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNEG">VNEG</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSQRT_A1_S" iformfile="vsqrt.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSQRT">VSQRT</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNEG_A2_D" iformfile="vneg.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VNEG">VNEG</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSQRT_A1_D" iformfile="vsqrt.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSQRT">VSQRT</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_24_fpdp2reg" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTB_A1_SH" iformfile="vcvtb.xml" label="half-precision to single-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTB">VCVTB</td>
|
|
<td class="enctags">A1, Half-precision to single-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTT_A1_SH" iformfile="vcvtt.xml" label="half-precision to single-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVTT">VCVTT</td>
|
|
<td class="enctags">A1, Half-precision to single-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTB_A1_DH" iformfile="vcvtb.xml" label="half-precision to double-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTB">VCVTB</td>
|
|
<td class="enctags">A1, Half-precision to double-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTT_A1_DH" iformfile="vcvtt.xml" label="half-precision to double-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">010</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVTT">VCVTT</td>
|
|
<td class="enctags">A1, Half-precision to double-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTB_A1_bfs" arch_version="FEAT_AA32BF16" iformfile="vcvtb_bfs.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTB_bfs">VCVTB (BFloat16)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTT_A1_bfs" arch_version="FEAT_AA32BF16" iformfile="vcvtt_bfs.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVTT_bfs">VCVTT (BFloat16)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTB_A1_HS" iformfile="vcvtb.xml" label="single-precision to half-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTB">VCVTB</td>
|
|
<td class="enctags">A1, Single-precision to half-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTT_A1_HS" iformfile="vcvtt.xml" label="single-precision to half-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVTT">VCVTT</td>
|
|
<td class="enctags">A1, Single-precision to half-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTB_A1_HD" iformfile="vcvtb.xml" label="double-precision to half-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTB">VCVTB</td>
|
|
<td class="enctags">A1, Double-precision to half-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTT_A1_HD" iformfile="vcvtt.xml" label="double-precision to half-precision" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">011</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVTT">VCVTT</td>
|
|
<td class="enctags">A1, Double-precision to half-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_A1_H" arch_version="FEAT_FP16" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_A1_H" arch_version="FEAT_FP16" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_A1_S" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_A1_S" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_A1_D" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_A1_D" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_A2_H" arch_version="FEAT_FP16" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_A2_H" arch_version="FEAT_FP16" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_A2_S" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_A2_S" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMP_A2_D" iformfile="vcmp.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMP">VCMP</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMPE_A2_D" iformfile="vcmpe.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCMPE">VCMPE</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTR_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vrintr_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTR_vfp">VRINTR</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTZ_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vrintz_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRINTZ_vfp">VRINTZ (floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTR_vfp_A1_S" iformfile="vrintr_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTR_vfp">VRINTR</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTZ_vfp_A1_S" iformfile="vrintz_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRINTZ_vfp">VRINTZ (floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTR_vfp_A1_D" iformfile="vrintr_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTR_vfp">VRINTR</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTZ_vfp_A1_D" iformfile="vrintz_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">110</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRINTZ_vfp">VRINTZ (floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTX_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vrintx_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTX_vfp">VRINTX (floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_56_fpdp2reg" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTX_vfp_A1_S" iformfile="vrintx_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTX_vfp">VRINTX (floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_ds_A1" iformfile="vcvt_ds.xml" label="single-precision to double-precision" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_ds">VCVT (between double-precision and single-precision)</td>
|
|
<td class="enctags">A1, Single-precision to double-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTX_vfp_A1_D" iformfile="vrintx_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTX_vfp">VRINTX (floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_sd_A1" iformfile="vcvt_ds.xml" label="double-precision to single-precision" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="3" class="bitfield">111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_ds">VCVT (between double-precision and single-precision)</td>
|
|
<td class="enctags">A1, Double-precision to single-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_vi_A1_H" arch_version="FEAT_FP16" iformfile="vcvt_vi.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_vi">VCVT (integer to floating-point, floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_vi_A1_S" iformfile="vcvt_vi.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_vi">VCVT (integer to floating-point, floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_vi_A1_D" iformfile="vcvt_vi.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_vi">VCVT (integer to floating-point, floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_62_fpdp2reg" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_63_fpdp2reg" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_64_fpdp2reg" undef="1" oneofthismnem="7" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VJCVT_A1" arch_version="FEAT_JSCVT" iformfile="vjcvt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VJCVT">VJCVT</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_toxv_A1_H" arch_version="FEAT_FP16" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">01x</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_toxv_A1_S" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">01x</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_toxv_A1_D" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">01x</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_uiv_A1_H" arch_version="FEAT_FP16" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_uiv_A1_H" arch_version="FEAT_FP16" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_uiv_A1_S" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_uiv_A1_S" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_uiv_A1_D" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_uiv_A1_D" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">100</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_siv_A1_H" arch_version="FEAT_FP16" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_siv_A1_H" arch_version="FEAT_FP16" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_siv_A1_S" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_siv_A1_S" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTR_siv_A1_D" iformfile="vcvtr_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVTR_iv">VCVTR</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_siv_A1_D" iformfile="vcvt_iv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">101</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_iv">VCVT (floating-point to integer, floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_xv_A1_H" arch_version="FEAT_FP16" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">11x</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_xv_A1_S" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">11x</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_xv_A1_D" iformfile="vcvt_xv.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="3" class="bitfield">11x</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xv">VCVT (between floating-point and fixed-point, floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fpimm" title="Floating-point move immediate">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="imm4H" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="imm4L" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fpimm" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="29*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_fpimm" undef="1" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_i_A2_H" arch_version="FEAT_FP16" iformfile="vmov_i.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_i_A2_S" iformfile="vmov_i.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_i_A2_D" iformfile="vmov_i.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="sys_mov32">Advanced SIMD and System register 32-bit move</funcgroupheader>
|
|
<iclass_sect id="movsimdgp" title="Advanced SIMD 8/16/32-bit element move/duplicate">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="opc1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" width="2" name="opc2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="movsimdgp" cols="5">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="6*" />
|
|
<col colno="4" printwidth="43*" />
|
|
<col colno="5" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc1</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">opc2</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMOV_rs_A1" iformfile="vmov_rs.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">0xx</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td class="iformname" iformid="VMOV_rs">VMOV (general-purpose register to scalar)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_sr_A1" iformfile="vmov_sr.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td class="iformname" iformid="VMOV_sr">VMOV (scalar to general-purpose register)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDUP_r_A1" iformfile="vdup_r.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">1xx</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td class="iformname" iformid="VDUP_r">VDUP (general-purpose register)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_movsimdgp" undef="1" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">1xx</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="movfpgp16" title="Floating-point 16-bit move">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="movfpgp16" cols="2">
|
|
<col colno="1" printwidth="60*" />
|
|
<col colno="2" printwidth="33*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMOV_h_A1" arch_version="FEAT_FP16" iformfile="vmov_h.xml" first="t" last="t">
|
|
<td class="iformname" iformid="VMOV_h">VMOV (between general-purpose register and half-precision)</td>
|
|
<td class="enctags">A1, To general-purpose register</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="movfpgp32" title="Floating-point 32-bit move">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="movfpgp32" cols="2">
|
|
<col colno="1" printwidth="62*" />
|
|
<col colno="2" printwidth="33*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMOV_s_A1" iformfile="vmov_s.xml" first="t" last="t">
|
|
<td class="iformname" iformid="VMOV_s">VMOV (between general-purpose register and single-precision)</td>
|
|
<td class="enctags">A1, To general-purpose register</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="movfpsr" title="Floating-point move special register">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="reg" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="movfpsr" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMSR_A1_AS" iformfile="vmsr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMSR">VMSR</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMRS_A1_AS" iformfile="vmrs.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMRS">VMRS</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="movcpgp32" title="System register 32-bit move">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" width="3" name="opc1" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="CRn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="8" name="cp15" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" width="3" name="opc2" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="CRm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="movcpgp32" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="MCR_A1" iformfile="mcr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="MCR">MCR</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MRC_A1" iformfile="mrc.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="MRC">MRC</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="sysldst_mov64">Advanced SIMD and System register load/store and 64-bit move</funcgroupheader>
|
|
<iclass_sect id="movsimdfpgp64" title="Advanced SIMD and floating-point 64-bit move">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rt2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" width="2" name="opc2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="o3" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="movsimdfpgp64" cols="7">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="6*" />
|
|
<col colno="4" printwidth="6*" />
|
|
<col colno="5" printwidth="4*" />
|
|
<col colno="6" printwidth="87*" />
|
|
<col colno="7" printwidth="36*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="5">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">D</th>
|
|
<th class="bitfields">op</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">opc2</th>
|
|
<th class="bitfields">o3</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_movsimdfpgp64" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_movsimdfpgp64" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_movsimdfpgp64" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_18_movsimdfpgp64" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_toss_A1" iformfile="vmov_ss.xml" label="from general-purpose registers" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMOV_ss">VMOV (between two general-purpose registers and two single-precision registers)</td>
|
|
<td class="enctags">A1, From general-purpose registers</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_tod_A1" iformfile="vmov_d.xml" label="from general-purpose registers" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMOV_d">VMOV (between two general-purpose registers and a doubleword floating-point register)</td>
|
|
<td class="enctags">A1, From general-purpose registers</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_19_movsimdfpgp64" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_ss_A1" iformfile="vmov_ss.xml" label="to general-purpose registers" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMOV_ss">VMOV (between two general-purpose registers and two single-precision registers)</td>
|
|
<td class="enctags">A1, To general-purpose registers</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOV_d_A1" iformfile="vmov_d.xml" label="to general-purpose registers" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMOV_d">VMOV (between two general-purpose registers and a doubleword floating-point register)</td>
|
|
<td class="enctags">A1, To general-purpose registers</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstsimdfp" title="Advanced SIMD and floating-point load/store">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="P:U:D:W" op="!=" val="00x0" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstsimdfp" cols="9">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="9*" />
|
|
<col colno="6" printwidth="6*" />
|
|
<col colno="7" printwidth="10*" />
|
|
<col colno="8" printwidth="27*" />
|
|
<col colno="9" printwidth="29*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="7">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">P</th>
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">W</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">Rn</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">imm8</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_ldstsimdfp" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_ldstsimdfp" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTM_A2" iformfile="vstm.xml" label="single-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSTM">VSTM, VSTMDB, VSTMIA</td>
|
|
<td class="enctags">A2, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTM_A1" iformfile="vstm.xml" label="double-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx0</td>
|
|
<td class="iformname" iformid="VSTM">VSTM, VSTMDB, VSTMIA</td>
|
|
<td class="enctags">A1, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="FSTMIAX_A1" iformfile="fstmx.xml" label="Increment After" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx1</td>
|
|
<td class="iformname" iformid="FSTMX">FSTMDBX, FSTMIAX</td>
|
|
<td class="enctags">A1, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDM_A2" iformfile="vldm.xml" label="single-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDM">VLDM, VLDMDB, VLDMIA</td>
|
|
<td class="enctags">A2, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDM_A1" iformfile="vldm.xml" label="double-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx0</td>
|
|
<td class="iformname" iformid="VLDM">VLDM, VLDMDB, VLDMIA</td>
|
|
<td class="enctags">A1, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="FLDMIAX_A1" iformfile="fldmx.xml" label="Increment After" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx1</td>
|
|
<td class="iformname" iformid="FLDMX">FLDM*X (FLDMDBX, FLDMIAX)</td>
|
|
<td class="enctags">A1, Increment After</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTR_A1_H" arch_version="FEAT_FP16" iformfile="vstr.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSTR">VSTR</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTR_A1_S" iformfile="vstr.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSTR">VSTR</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTR_A1_D" iformfile="vstr.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSTR">VSTR</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_A1_H" arch_version="FEAT_FP16" iformfile="vldr_i.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_i">VLDR (immediate)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_A1_S" iformfile="vldr_i.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_i">VLDR (immediate)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_A1_D" iformfile="vldr_i.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_i">VLDR (immediate)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_19_ldstsimdfp" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTMDB_A2" iformfile="vstm.xml" label="single-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSTM">VSTM, VSTMDB, VSTMIA</td>
|
|
<td class="enctags">A2, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSTMDB_A1" iformfile="vstm.xml" label="double-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx0</td>
|
|
<td class="iformname" iformid="VSTM">VSTM, VSTMDB, VSTMIA</td>
|
|
<td class="enctags">A1, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="FSTMDBX_A1" iformfile="fstmx.xml" label="Decrement Before" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx1</td>
|
|
<td class="iformname" iformid="FSTMX">FSTMDBX, FSTMIAX</td>
|
|
<td class="enctags">A1, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDMDB_A2" iformfile="vldm.xml" label="single-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDM">VLDM, VLDMDB, VLDMIA</td>
|
|
<td class="enctags">A2, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDMDB_A1" iformfile="vldm.xml" label="double-precision scalar" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx0</td>
|
|
<td class="iformname" iformid="VLDM">VLDM, VLDMDB, VLDMIA</td>
|
|
<td class="enctags">A1, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="FLDMDBX_A1" iformfile="fldmx.xml" label="Decrement Before" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield">xxxxxxx1</td>
|
|
<td class="iformname" iformid="FLDMX">FLDM*X (FLDMDBX, FLDMIAX)</td>
|
|
<td class="enctags">A1, Decrement Before</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_l_A1_H" arch_version="FEAT_FP16" iformfile="vldr_l.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_l">VLDR (literal)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_l_A1_S" iformfile="vldr_l.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_l">VLDR (literal)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLDR_l_A1_D" iformfile="vldr_l.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname" iformid="VLDR_l">VLDR (literal)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_35_ldstsimdfp" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="8" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="movcpgp64" title="System register 64-bit move">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="5" settings="5">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rt2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Rt" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="8" name="cp15" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" width="4" name="opc1" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="CRm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="movcpgp64" cols="4">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">D</th>
|
|
<th class="bitfields">L</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_movcpgp64" undef="1" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MCRR_A1" iformfile="mcrr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="MCRR">MCRR</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="MRRC_A1" iformfile="mrrc.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="MRRC">MRRC</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstcp" title="System register load/store">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="P" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="W" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="CRd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="8" name="cp15" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" width="8" name="imm8" usename="1">
|
|
<c colspan="8"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="P:U:D:W" op="!=" val="00x0" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstcp" cols="8">
|
|
<col colno="1" printwidth="8*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="9*" />
|
|
<col colno="5" printwidth="9*" />
|
|
<col colno="6" printwidth="6*" />
|
|
<col colno="7" printwidth="18*" />
|
|
<col colno="8" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="6">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">P:U:W</th>
|
|
<th class="bitfields">D</th>
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">Rn</th>
|
|
<th class="bitfields">CRd</th>
|
|
<th class="bitfields">cp15</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_ldstcp" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">!= 0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDC_l_A1" iformfile="ldc_l.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDC_l">LDC (literal)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_ldstcp" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_ldstcp" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">!= 000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STC_A1_post" iformfile="stc.xml" label="post-indexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STC">STC</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDC_i_A1_post" iformfile="ldc_i.xml" label="post-indexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDC_i">LDC (immediate)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STC_A1_unind" iformfile="stc.xml" label="unindexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STC">STC</td>
|
|
<td class="enctags">A1, Unindexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDC_i_A1_unind" iformfile="ldc_i.xml" label="unindexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDC_i">LDC (immediate)</td>
|
|
<td class="enctags">A1, Unindexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STC_A1_off" iformfile="stc.xml" label="offset" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1x0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STC">STC</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDC_i_A1_off" iformfile="ldc_i.xml" label="offset" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1x0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDC_i">LDC (immediate)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="STC_A1_pre" iformfile="stc.xml" label="pre-indexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="STC">STC</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="LDC_i_A1_pre" iformfile="ldc_i.xml" label="pre-indexed" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="LDC_i">LDC (immediate)</td>
|
|
<td class="enctags">A1, Pre-indexed</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="advsimdext">Unconditional Advanced SIMD and floating-point instructions</funcgroupheader>
|
|
<iclass_sect id="simd_dotprod" title="Advanced SIMD and floating-point dot product">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="op1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="8" name="op4" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd_dotprod" cols="7">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="5*" />
|
|
<col colno="3" printwidth="5*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="3*" />
|
|
<col colno="6" printwidth="21*" />
|
|
<col colno="7" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="5">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">op2</th>
|
|
<th class="bitfields">op4</th>
|
|
<th class="bitfields">Q</th>
|
|
<th class="bitfields">U</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_simd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDOT_s_A1_D" arch_version="FEAT_AA32BF16" iformfile="vdot_s.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDOT_s">VDOT (by element)</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_simd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDOT_s_A1_Q" arch_version="FEAT_AA32BF16" iformfile="vdot_s.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDOT_s">VDOT (by element)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_simd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_16_simd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSDOT_s_A1_D" arch_version="FEAT_DotProd" iformfile="vsdot_s.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSDOT_s">VSDOT (by element)</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUDOT_s_A1_D" arch_version="FEAT_DotProd" iformfile="vudot_s.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VUDOT_s">VUDOT (by element)</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSDOT_s_A1_Q" arch_version="FEAT_DotProd" iformfile="vsdot_s.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSDOT_s">VSDOT (by element)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUDOT_s_A1_Q" arch_version="FEAT_DotProd" iformfile="vudot_s.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VUDOT_s">VUDOT (by element)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_simd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_simd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUSDOT_s_A1_D" arch_version="FEAT_AA32I8MM" iformfile="vusdot_s.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VUSDOT_s">VUSDOT (by element)</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUDOT_s_A1_D" arch_version="FEAT_AA32I8MM" iformfile="vsudot_s.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSUDOT_s">VSUDOT (by element)</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUSDOT_s_A1_Q" arch_version="FEAT_AA32I8MM" iformfile="vusdot_s.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VUSDOT_s">VUSDOT (by element)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUDOT_s_A1_Q" arch_version="FEAT_AA32I8MM" iformfile="vsudot_s.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VSUDOT_s">VSUDOT (by element)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_27_simd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_28_simd_dotprod" undef="1" oneofthismnem="8" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="floatdpmac" title="Advanced SIMD and floating-point multiply with accumulate">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="8" settings="8">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="23" name="op1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="floatdpmac" cols="6">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="5*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="36*" />
|
|
<col colno="6" printwidth="60*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">op2</th>
|
|
<th class="bitfields">Q</th>
|
|
<th class="bitfields">U</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VCMLA_s_A1_QH" arch_version="FEAT_FCMA" iformfile="vcmla_s.xml" label="128-bit SIMD vector of half-precision floating-point" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMLA_s">VCMLA (by element)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector of half-precision floating-point</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMAL_s_A1_Q" arch_version="FEAT_FHM" iformfile="vfmal_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMAL_s">VFMAL (by scalar)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMSL_s_A1_Q" arch_version="FEAT_FHM" iformfile="vfmsl_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMSL_s">VFMSL (by scalar)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_floatdpmac" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMA_bfs_A1_Q" arch_version="FEAT_AA32BF16" iformfile="vfma_bfs.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMA_bfs">VFMAB, VFMAT (BFloat16, by scalar)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMLA_s_A1_DS" arch_version="FEAT_FCMA" iformfile="vcmla_s.xml" label="64-bit SIMD vector of single-precision floating-point" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMLA_s">VCMLA (by element)</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector of single-precision floating-point</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_floatdpmac" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMLA_s_A1_QS" arch_version="FEAT_FCMA" iformfile="vcmla_s.xml" label="128-bit SIMD vector of single-precision floating-point" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMLA_s">VCMLA (by element)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector of single-precision floating-point</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd3reg_sameext" title="Advanced SIMD three registers of the same length extension">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" width="2" name="op1" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="op2" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="10" name="op3" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="8" name="op4" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd3reg_sameext" cols="8">
|
|
<col colno="1" printwidth="5*" />
|
|
<col colno="2" printwidth="5*" />
|
|
<col colno="3" printwidth="5*" />
|
|
<col colno="4" printwidth="5*" />
|
|
<col colno="5" printwidth="3*" />
|
|
<col colno="6" printwidth="3*" />
|
|
<col colno="7" printwidth="33*" />
|
|
<col colno="8" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="6">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">op1</th>
|
|
<th class="bitfields">op2</th>
|
|
<th class="bitfields">op3</th>
|
|
<th class="bitfields">op4</th>
|
|
<th class="bitfields">Q</th>
|
|
<th class="bitfields">U</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VCADD_A1_D" arch_version="FEAT_FCMA" iformfile="vcadd.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCADD">VCADD</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_40_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCADD_A1_Q" arch_version="FEAT_FCMA" iformfile="vcadd.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCADD">VCADD</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_42_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">x1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMMLA_A1_Q" arch_version="FEAT_AA32BF16" iformfile="vmmla.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMMLA">VMMLA</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_16_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDOT_A1_D" arch_version="FEAT_AA32BF16" iformfile="vdot.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDOT">VDOT (vector)</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_18_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VDOT_A1_Q" arch_version="FEAT_AA32BF16" iformfile="vdot.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VDOT">VDOT (vector)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_21_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_22_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMAL_A1_Q" arch_version="FEAT_FHM" iformfile="vfmal.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMAL">VFMAL (vector)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_27_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_28_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSMMLA_A1_Q" arch_version="FEAT_AA32I8MM" iformfile="vsmmla.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSMMLA">VSMMLA</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUMMLA_A1_Q" arch_version="FEAT_AA32I8MM" iformfile="vummla.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VUMMLA">VUMMLA</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSDOT_A1_D" arch_version="FEAT_DotProd" iformfile="vsdot.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSDOT">VSDOT (vector)</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUDOT_A1_D" arch_version="FEAT_DotProd" iformfile="vudot.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VUDOT">VUDOT (vector)</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSDOT_A1_Q" arch_version="FEAT_DotProd" iformfile="vsdot.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSDOT">VSDOT (vector)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUDOT_A1_Q" arch_version="FEAT_DotProd" iformfile="vudot.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VUDOT">VUDOT (vector)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMA_bf_A1_Q" arch_version="FEAT_AA32BF16" iformfile="vfma_bf.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMA_bf">VFMAB, VFMAT (BFloat16, vector)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_36_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_37_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_38_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMSL_A1_Q" arch_version="FEAT_FHM" iformfile="vfmsl.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMSL">VFMSL (vector)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_45_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_46_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUSMMLA_A1_Q" arch_version="FEAT_AA32I8MM" iformfile="vusmmla.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VUSMMLA">VUSMMLA</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_48_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUSDOT_A1_D" arch_version="FEAT_AA32I8MM" iformfile="vusdot.xml" label="64-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VUSDOT">VUSDOT (vector)</td>
|
|
<td class="enctags">A1, 64-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_51_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUSDOT_A1_Q" arch_version="FEAT_AA32I8MM" iformfile="vusdot.xml" label="128-bit SIMD vector" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VUSDOT">VUSDOT (vector)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_52_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_53_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_54_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCMLA_A1_Q" arch_version="FEAT_FCMA" iformfile="vcmla.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCMLA">VCMLA</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_55_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_56_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_57_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_58_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_59_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_60_simd3reg_sameext" undef="1" oneofthismnem="29" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fpcsel" title="Floating-point conditional select">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="cc" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1" settings="2" constraint="!= 00">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fpcsel" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="32*" />
|
|
<col colno="3" printwidth="43*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VSELGT_A1_H" arch_version="FEAT_FP16" iformfile="vsel.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td class="iformname" iformid="VSEL">VSELEQ, VSELGE, VSELGT, VSELVS</td>
|
|
<td class="enctags">A1, Greater than, half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSELGT_A1_S" iformfile="vsel.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td class="iformname" iformid="VSEL">VSELEQ, VSELGE, VSELGT, VSELVS</td>
|
|
<td class="enctags">A1, Greater than, single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSELGT_A1_D" iformfile="vsel.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td class="iformname" iformid="VSEL">VSELEQ, VSELGE, VSELGT, VSELVS</td>
|
|
<td class="enctags">A1, Greater than, double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fpcvtrnd" title="Floating-point directed convert to integer">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="3" settings="3">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="18" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="17" width="2" name="RM" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1" settings="2" constraint="!= 00">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="7" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fpcvtrnd" cols="6">
|
|
<col colno="1" printwidth="4*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="7*" />
|
|
<col colno="4" printwidth="4*" />
|
|
<col colno="5" printwidth="25*" />
|
|
<col colno="6" printwidth="29*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">o1</th>
|
|
<th class="bitfields">RM</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_23_fpcvtrnd" undef="1" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">!= 00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTA_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vrinta_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTA_vfp">VRINTA (floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTA_vfp_A1_S" iformfile="vrinta_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTA_vfp">VRINTA (floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTA_vfp_A1_D" iformfile="vrinta_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTA_vfp">VRINTA (floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTN_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vrintn_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTN_vfp">VRINTN (floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTN_vfp_A1_S" iformfile="vrintn_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTN_vfp">VRINTN (floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTN_vfp_A1_D" iformfile="vrintn_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTN_vfp">VRINTN (floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTP_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vrintp_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTP_vfp">VRINTP (floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTP_vfp_A1_S" iformfile="vrintp_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTP_vfp">VRINTP (floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTP_vfp_A1_D" iformfile="vrintp_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTP_vfp">VRINTP (floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTM_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vrintm_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTM_vfp">VRINTM (floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTM_vfp_A1_S" iformfile="vrintm_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTM_vfp">VRINTM (floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTM_vfp_A1_D" iformfile="vrintm_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRINTM_vfp">VRINTM (floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTA_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vcvta_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTA_vfp">VCVTA (floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTA_vfp_A1_S" iformfile="vcvta_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTA_vfp">VCVTA (floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTA_vfp_A1_D" iformfile="vcvta_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTA_vfp">VCVTA (floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTN_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vcvtn_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTN_vfp">VCVTN (floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTN_vfp_A1_S" iformfile="vcvtn_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTN_vfp">VCVTN (floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTN_vfp_A1_D" iformfile="vcvtn_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTN_vfp">VCVTN (floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTP_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vcvtp_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTP_vfp">VCVTP (floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTP_vfp_A1_S" iformfile="vcvtp_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTP_vfp">VCVTP (floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTP_vfp_A1_D" iformfile="vcvtp_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTP_vfp">VCVTP (floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTM_vfp_A1_H" arch_version="FEAT_FP16" iformfile="vcvtm_vfp.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTM_vfp">VCVTM (floating-point)</td>
|
|
<td class="enctags">A1, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTM_vfp_A1_S" iformfile="vcvtm_vfp.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTM_vfp">VCVTM (floating-point)</td>
|
|
<td class="enctags">A1, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTM_vfp_A1_D" iformfile="vcvtm_vfp.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTM_vfp">VCVTM (floating-point)</td>
|
|
<td class="enctags">A1, Double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fpextins" title="Floating-point extraction and insertion">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="6" settings="6">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1" settings="2" constraint="!= 00">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="7" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fpextins" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_fpextins" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOVX_A1" arch_version="FEAT_FP16" iformfile="vmovx.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOVX">VMOVX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VINS_A1" arch_version="FEAT_FP16" iformfile="vins.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VINS">VINS</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_fpextins" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="fpminmaxnm" title="Floating-point minNum/maxNum">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="size" usename="1" settings="2" constraint="!= 00">
|
|
<c colspan="2">!= 00</c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
<decode_constraint name="size" op="!=" val="00" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="fpminmaxnm" cols="4">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="29*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMAXNM_A2_H" arch_version="FEAT_FP16" iformfile="vmaxnm.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMAXNM">VMAXNM</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMINNM_A2_H" arch_version="FEAT_FP16" iformfile="vminnm.xml" label="half-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMINNM">VMINNM</td>
|
|
<td class="enctags">A2, Half-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMAXNM_A2_S" iformfile="vmaxnm.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMAXNM">VMAXNM</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMINNM_A2_S" iformfile="vminnm.xml" label="single-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMINNM">VMINNM</td>
|
|
<td class="enctags">A2, Single-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMAXNM_A2_D" iformfile="vmaxnm.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMAXNM">VMAXNM</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMINNM_A2_D" iformfile="vminnm.xml" label="double-precision scalar" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMINNM">VMINNM</td>
|
|
<td class="enctags">A2, Double-precision scalar</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="svcall">Supervisor call</funcgroupheader>
|
|
<iclass_sect id="svc" title="Supervisor Call">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
|
|
<c colspan="4">!= 1111</c>
|
|
</box>
|
|
<box hibit="27" width="4" settings="4">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" width="24" name="imm24" usename="1">
|
|
<c colspan="24"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
<decode_constraint name="cond" op="!=" val="1111" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="svc" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SVC_A1" iformfile="svc.xml" first="t" last="t">
|
|
<td class="iformname" iformid="SVC">SVC</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="uncondmisc">Miscellaneous</funcgroupheader>
|
|
<iclass_sect id="cps" title="Change Process State">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="12" settings="12">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="2" name="imod" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="17" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="16" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="9" name="E" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="8" name="A" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="7" name="I" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="F" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="4" width="5" name="mode" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="cps" cols="8">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="4*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="3*" />
|
|
<col colno="6" printwidth="7*" />
|
|
<col colno="7" printwidth="19*" />
|
|
<col colno="8" printwidth="39*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="6">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">imod</th>
|
|
<th class="bitfields">M</th>
|
|
<th class="bitfields">op</th>
|
|
<th class="bitfields">I</th>
|
|
<th class="bitfields">F</th>
|
|
<th class="bitfields">mode</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SETEND_A1" iformfile="setend.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="5" class="bitfield">0xxxx</td>
|
|
<td class="iformname" iformid="SETEND">SETEND</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CPS_A1_AS" iformfile="cps.xml" label="change mode" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="5" class="bitfield"></td>
|
|
<td class="iformname" iformid="CPS">CPS, CPSID, CPSIE</td>
|
|
<td class="enctags">A1, Change mode</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CPSIE_A1_ASM" iformfile="cps.xml" label="interrupt enable and change mode" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="5" class="bitfield"></td>
|
|
<td class="iformname" iformid="CPS">CPS, CPSID, CPSIE</td>
|
|
<td class="enctags">A1, Interrupt enable and change mode</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_cps" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="5" class="bitfield">1xxxx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_18_cps" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="5" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_19_cps" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="5" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CPSID_A1_ASM" iformfile="cps.xml" label="interrupt disable and change mode" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="5" class="bitfield"></td>
|
|
<td class="iformname" iformid="CPS">CPS, CPSID, CPSIE</td>
|
|
<td class="enctags">A1, Interrupt disable and change mode</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="setpan" title="SETPAN">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="12" settings="12">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="9" name="imm1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="7" width="4" settings="4">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="1" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="0" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="setpan" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="SETPAN_A1" arch_version="FEAT_PAN" iformfile="setpan.xml" first="t" last="t">
|
|
<td class="iformname" iformid="SETPAN">SETPAN</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="uncondhints">Memory hints and barriers</funcgroupheader>
|
|
<iclass_sect id="barriers" title="Barriers">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="12" settings="12">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="18" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="17" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="16" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="10" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="9" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="8" settings="1">
|
|
<c>(0)</c>
|
|
</box>
|
|
<box hibit="7" width="4" name="opcode" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="option" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="barriers" cols="4">
|
|
<col colno="1" printwidth="8*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opcode</th>
|
|
<th class="bitfields">option</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNPREDICTABLE_11_barriers" unpred="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNPREDICTABLE</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="CLREX_A1" iformfile="clrex.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="CLREX">CLREX</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNPREDICTABLE_13_barriers" unpred="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">001x</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNPREDICTABLE</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="DSB_A1" iformfile="dsb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="4" class="bitfield">!= 0x00</td>
|
|
<td class="iformname" iformid="DSB">DSB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SSBB_A1" iformfile="ssbb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="SSBB">SSBB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PSSBB_A1" iformfile="pssbb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td class="iformname" iformid="PSSBB">PSSBB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="DMB_A1" iformfile="dmb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="DMB">DMB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="ISB_A1" iformfile="isb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="ISB">ISB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SB_A1" arch_version="FEAT_SB" iformfile="sb.xml" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="SB">SB</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNPREDICTABLE_20_barriers" unpred="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1xxx</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNPREDICTABLE</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="preload_imm" title="Preload (immediate)">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="24" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="R" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="11" width="12" name="imm12" usename="1">
|
|
<c colspan="12"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="preload_imm" cols="5">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="3*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="31*" />
|
|
<col colno="5" printwidth="19*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">D</th>
|
|
<th class="bitfields">R</th>
|
|
<th class="bitfields">Rn</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_11_preload_imm" reserved_nop_hint="1" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLI_i_A1" iformfile="pli_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname" iformid="PLI_i">PLI (immediate, literal)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLD_l_A1" iformfile="pld_l.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="PLD_l">PLD (literal)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLDW_i_A1" iformfile="pld_i.xml" label="preload write" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="PLD_i">PLD, PLDW (immediate)</td>
|
|
<td class="enctags">A1, Preload write</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLD_i_A1" iformfile="pld_i.xml" label="preload read" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">!= 1111</td>
|
|
<td class="iformname" iformid="PLD_i">PLD, PLDW (immediate)</td>
|
|
<td class="enctags">A1, Preload read</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="preload_reg" title="Preload (register)">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="22" name="o2" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="14" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="13" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="12" settings="1">
|
|
<c>(1)</c>
|
|
</box>
|
|
<box hibit="11" width="5" name="imm5" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="6" width="2" name="stype" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="preload_reg" cols="5">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="12*" />
|
|
<col colno="4" printwidth="31*" />
|
|
<col colno="5" printwidth="45*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">D</th>
|
|
<th class="bitfields">o2</th>
|
|
<th class="bitfields">imm5:stype</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="RESERVED_nop_hint_11_preload_reg" reserved_nop_hint="1" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="7" class="bitfield"></td>
|
|
<td class="iformname">Reserved hint, behaves as NOP</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLI_r_A1" iformfile="pli_r.xml" label="shift or rotate by value" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="PLI_r">PLI (register)</td>
|
|
<td class="enctags">A1, Shift or rotate by value</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLI_r_A1_RRX" iformfile="pli_r.xml" label="rotate right with extend" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="PLI_r">PLI (register)</td>
|
|
<td class="enctags">A1, Rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLDW_r_A1" iformfile="pld_r.xml" label="preload write, optional shift or rotate" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="PLD_r">PLD, PLDW (register)</td>
|
|
<td class="enctags">A1, Preload write, optional shift or rotate</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLDW_r_A1_RRX" iformfile="pld_r.xml" label="preload write, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="PLD_r">PLD, PLDW (register)</td>
|
|
<td class="enctags">A1, Preload write, rotate right with extend</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLD_r_A1" iformfile="pld_r.xml" label="preload read, optional shift or rotate" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="7" class="bitfield">!= 0000011</td>
|
|
<td class="iformname" iformid="PLD_r">PLD, PLDW (register)</td>
|
|
<td class="enctags">A1, Preload read, optional shift or rotate</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="PLD_r_A1_RRX" iformfile="pld_r.xml" label="preload read, rotate right with extend" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="7" class="bitfield">0000011</td>
|
|
<td class="iformname" iformid="PLD_r">PLD, PLDW (register)</td>
|
|
<td class="enctags">A1, Preload read, rotate right with extend</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="advsimdls">Advanced SIMD element or structure load/store</funcgroupheader>
|
|
<iclass_sect id="ldv_ssall" title="Advanced SIMD load single structure to all lanes">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="N" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="5" name="T" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="a" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldv_ssall" cols="6">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="3*" />
|
|
<col colno="4" printwidth="9*" />
|
|
<col colno="5" printwidth="48*" />
|
|
<col colno="6" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">N</th>
|
|
<th class="bitfields">a</th>
|
|
<th class="bitfields">Rm</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="UNALLOCATED_11_ldv_ssall" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_a_A1_postr" iformfile="vld1_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_a">VLD1 (single element to all lanes)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_a_A1_posti" iformfile="vld1_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_a">VLD1 (single element to all lanes)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_a_A1_nowb" iformfile="vld1_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_a">VLD1 (single element to all lanes)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_a_A1_postr" iformfile="vld2_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_a">VLD2 (single 2-element structure to all lanes)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_a_A1_posti" iformfile="vld2_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_a">VLD2 (single 2-element structure to all lanes)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_a_A1_nowb" iformfile="vld2_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_a">VLD2 (single 2-element structure to all lanes)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_a_A1_postr" iformfile="vld3_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD3_a">VLD3 (single 3-element structure to all lanes)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_a_A1_posti" iformfile="vld3_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD3_a">VLD3 (single 3-element structure to all lanes)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_a_A1_nowb" iformfile="vld3_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD3_a">VLD3 (single 3-element structure to all lanes)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_12_ldv_ssall" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_a_A1_postr" iformfile="vld4_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD4_a">VLD4 (single 4-element structure to all lanes)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_a_A1_posti" iformfile="vld4_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD4_a">VLD4 (single 4-element structure to all lanes)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_a_A1_nowb" iformfile="vld4_a.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD4_a">VLD4 (single 4-element structure to all lanes)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstv_ms" title="Advanced SIMD load/store multiple structures">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="itype" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="5" width="2" name="align" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="ldstv_ms" cols="5">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="7*" />
|
|
<col colno="3" printwidth="9*" />
|
|
<col colno="4" printwidth="38*" />
|
|
<col colno="5" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="3">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">itype</th>
|
|
<th class="bitfields">Rm</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VST4_m_A1_postr" iformfile="vst4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST4_m">VST4 (multiple 4-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_m_A1_posti" iformfile="vst4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST4_m">VST4 (multiple 4-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_m_A1_nowb" iformfile="vst4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST4_m">VST4 (multiple 4-element structures)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A4_postr" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A4, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A4_posti" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A4, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A4_nowb" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A4, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_A2_postr" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_A2_posti" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_A2_nowb" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_m_A1_postr" iformfile="vst3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST3_m">VST3 (multiple 3-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_m_A1_posti" iformfile="vst3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST3_m">VST3 (multiple 3-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_m_A1_nowb" iformfile="vst3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST3_m">VST3 (multiple 3-element structures)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A3_postr" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A3_posti" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A3_nowb" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A1_postr" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A1_posti" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A1_nowb" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_A1_postr" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_A1_posti" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_m_A1_nowb" iformfile="vst2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST2_m">VST2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A2_postr" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A2_posti" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_m_A2_nowb" iformfile="vst1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_m">VST1 (multiple single elements)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_m_A1_postr" iformfile="vld4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD4_m">VLD4 (multiple 4-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_m_A1_posti" iformfile="vld4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD4_m">VLD4 (multiple 4-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_m_A1_nowb" iformfile="vld4_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD4_m">VLD4 (multiple 4-element structures)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A4_postr" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A4, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A4_posti" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A4, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A4_nowb" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A4, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_A2_postr" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_A2_posti" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_A2_nowb" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_m_A1_postr" iformfile="vld3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD3_m">VLD3 (multiple 3-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_m_A1_posti" iformfile="vld3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD3_m">VLD3 (multiple 3-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_m_A1_nowb" iformfile="vld3_m.xml" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD3_m">VLD3 (multiple 3-element structures)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_59_ldstv_ms" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A3_postr" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A3_posti" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A3_nowb" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A1_postr" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A1_posti" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A1_nowb" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_60_ldstv_ms" undef="1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">11xx</td>
|
|
<td bitwidth="4" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_A1_postr" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_A1_posti" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_m_A1_nowb" iformfile="vld2_m.xml" oneofthismnem="6" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_m">VLD2 (multiple 2-element structures)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A2_postr" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A2_posti" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_m_A2_nowb" iformfile="vld1_m.xml" oneofthismnem="12" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_m">VLD1 (multiple single elements)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="ldstv_ssone" title="Advanced SIMD load/store single structure to one lane">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="20" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Rn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" name="size" usename="1" settings="2" constraint="!= 11">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="N" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" width="4" name="index_align" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Rm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="ldstv_ssone" cols="6">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="4*" />
|
|
<col colno="4" printwidth="9*" />
|
|
<col colno="5" printwidth="49*" />
|
|
<col colno="6" printwidth="18*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">L</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">N</th>
|
|
<th class="bitfields">Rm</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VST1_1_A1_postr" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_A1_posti" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_A1_nowb" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_A1_postr" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_A1_posti" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_A1_nowb" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_A1_postr" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_A1_posti" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_A1_nowb" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_A1_postr" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_A1_posti" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_A1_nowb" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_A2_postr" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_A2_posti" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_A2_nowb" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_A2_postr" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_A2_posti" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_A2_nowb" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_A2_postr" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_A2_posti" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_A2_nowb" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_A2_postr" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_A2_posti" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_A2_nowb" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_A3_postr" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_A3_posti" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST1_1_A3_nowb" iformfile="vst1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST1_1">VST1 (single element from one lane)</td>
|
|
<td class="enctags">A3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_A3_postr" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_A3_posti" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST2_1_A3_nowb" iformfile="vst2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST2_1">VST2 (single 2-element structure from one lane)</td>
|
|
<td class="enctags">A3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_A3_postr" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_A3_posti" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST3_1_A3_nowb" iformfile="vst3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST3_1">VST3 (single 3-element structure from one lane)</td>
|
|
<td class="enctags">A3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_A3_postr" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_A3_posti" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VST4_1_A3_nowb" iformfile="vst4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VST4_1">VST4 (single 4-element structure from one lane)</td>
|
|
<td class="enctags">A3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_A1_postr" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_A1_posti" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_A1_nowb" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_A1_postr" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_A1_posti" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_A1_nowb" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_A1_postr" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_A1_posti" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_A1_nowb" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_A1_postr" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_A1_posti" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">A1, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_A1_nowb" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">A1, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_A2_postr" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_A2_posti" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_A2_nowb" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_A2_postr" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_A2_posti" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_A2_nowb" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_A2_postr" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_A2_posti" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_A2_nowb" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_A2_postr" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_A2_posti" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">A2, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_A2_nowb" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">A2, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_A3_postr" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_A3_posti" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD1_1_A3_nowb" iformfile="vld1_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD1_1">VLD1 (single element to one lane)</td>
|
|
<td class="enctags">A3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_A3_postr" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_A3_posti" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD2_1_A3_nowb" iformfile="vld2_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD2_1">VLD2 (single 2-element structure to one lane)</td>
|
|
<td class="enctags">A3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_A3_postr" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_A3_posti" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD3_1_A3_nowb" iformfile="vld3_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD3_1">VLD3 (single 3-element structure to one lane)</td>
|
|
<td class="enctags">A3, Offset</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_A3_postr" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">!= 11x1</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_A3_posti" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">A3, Post-indexed</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VLD4_1_A3_nowb" iformfile="vld4_1.xml" oneofthismnem="9" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VLD4_1">VLD4 (single 4-element structure to one lane)</td>
|
|
<td class="enctags">A3, Offset</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="a_simd3reg_same">Advanced SIMD three registers of the same length</funcgroupheader>
|
|
<iclass_sect id="simd3reg_same" title="Advanced SIMD three registers of the same length">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="opc" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" name="o1" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd3reg_same" cols="7">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="6*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="4*" />
|
|
<col colno="6" printwidth="31*" />
|
|
<col colno="7" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="5">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">Q</th>
|
|
<th class="bitfields">o1</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VFMA_A1_Q" iformfile="vfma.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMA">VFMA</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADD_f_A1_Q" iformfile="vadd_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VADD_f">VADD (floating-point)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLA_f_A1_Q" iformfile="vmla_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMLA_f">VMLA (floating-point)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a2" iformfile="vceq_r.xml" label="A2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCEQ_r">VCEQ (register)</td>
|
|
<td class="enctags">A2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMAX_f_A1_Q" iformfile="vmax_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMAX_f">VMAX (floating-point)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRECPS_A1_Q" iformfile="vrecps.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRECPS">VRECPS</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VHADD_A1_Q" iformfile="vhadd.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VHADD">VHADD</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VAND_r_A1_Q" iformfile="vand_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VAND_r">VAND (register)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQADD_A1_Q" iformfile="vqadd.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQADD">VQADD</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRHADD_A1_Q" iformfile="vrhadd.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRHADD">VRHADD</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1C_A1" arch_version="FEAT_SHA1" iformfile="sha1c.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA1C">SHA1C</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VHSUB_A1_Q" iformfile="vhsub.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VHSUB">VHSUB</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VBIC_r_A1_Q" iformfile="vbic_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBIC_r">VBIC (register)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSUB_A1_Q" iformfile="vqsub.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQSUB">VQSUB</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a1" iformfile="vcgt_r.xml" label="A1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCGT_r">VCGT (register)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a1" iformfile="vcge_r.xml" label="A1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCGE_r">VCGE (register)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1P_A1" arch_version="FEAT_SHA1" iformfile="sha1p.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA1P">SHA1P</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VFMS_A1_Q" iformfile="vfms.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VFMS">VFMS</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUB_f_A1_Q" iformfile="vsub_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSUB_f">VSUB (floating-point)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_f_A1_Q" iformfile="vmls_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMLS_f">VMLS (floating-point)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_109_simd3reg_same" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMIN_f_A1_Q" iformfile="vmin_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMIN_f">VMIN (floating-point)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSQRTS_A1_Q" iformfile="vrsqrts.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRSQRTS">VRSQRTS</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSHL_r_A1_Q" iformfile="vshl_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSHL_r">VSHL (register)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADD_i_A1_Q" iformfile="vadd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VADD_i">VADD (integer)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VORR_r_A1_Q" iformfile="vorr_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VORR_r">VORR (register)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VTST_A1_Q" iformfile="vtst.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VTST">VTST</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSHL_r_A1_Q" iformfile="vqshl_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQSHL_r">VQSHL (register)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLA_i_A1_Q" iformfile="vmla_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMLA_i">VMLA (integer)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSHL_A1_Q" iformfile="vrshl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VRSHL">VRSHL</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRSHL_A1_Q" iformfile="vqrshl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQRSHL">VQRSHL</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMULH_A1_Q" iformfile="vqdmulh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VQDMULH">VQDMULH</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1M_A1" arch_version="FEAT_SHA1" iformfile="sha1m.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA1M">SHA1M</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPADD_i_A1" iformfile="vpadd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VPADD_i">VPADD (integer)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMAX_i_A1_Q" iformfile="vmax_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMAX_i">VMAX (integer)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VORN_r_A1_Q" iformfile="vorn_r.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VORN_r">VORN (register)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMIN_i_A1_Q" iformfile="vmin_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMIN_i">VMIN (integer)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABD_i_A1_Q" iformfile="vabd_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VABD_i">VABD (integer)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABA_A1_Q" iformfile="vaba.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VABA">VABA</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1SU0_A1" arch_version="FEAT_SHA1" iformfile="sha1su0.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA1SU0">SHA1SU0</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPADD_f_A1" iformfile="vpadd_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VPADD_f">VPADD (floating-point)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_f_A1_Q" iformfile="vmul_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMUL_f">VMUL (floating-point)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a2" iformfile="vcge_r.xml" label="A2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCGE_r">VCGE (register)</td>
|
|
<td class="enctags">A2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VACGE_A1_Q" iformfile="vacge.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VACGE">VACGE</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPMAX_f_A1" iformfile="vpmax_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VPMAX_f">VPMAX (floating-point)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMAXNM_A1_Q" iformfile="vmaxnm.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">0x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMAXNM">VMAXNM</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VEOR_A1_Q" iformfile="veor.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VEOR">VEOR</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_i_A1_Q" iformfile="vmul_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMUL_i">VMUL (integer and polynomial)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA256H_A1" arch_version="FEAT_SHA256" iformfile="sha256h.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA256H">SHA256H</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPMAX_i_A1" iformfile="vpmax_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VPMAX_i">VPMAX (integer)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VBSL_A1_Q" iformfile="vbsl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBSL">VBSL</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPMIN_i_A1" iformfile="vpmin_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VPMIN_i">VPMIN (integer)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_65_simd3reg_same" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA256H2_A1" arch_version="FEAT_SHA256" iformfile="sha256h2.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA256H2">SHA256H2</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABD_f_A1_Q" iformfile="vabd_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VABD_f">VABD (floating-point)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a2" iformfile="vcgt_r.xml" label="A2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCGT_r">VCGT (register)</td>
|
|
<td class="enctags">A2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VACGT_A1_Q" iformfile="vacgt.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VACGT">VACGT</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPMIN_f_A1" iformfile="vpmin_f.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VPMIN_f">VPMIN (floating-point)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMINNM_A1_Q" iformfile="vminnm.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">1x</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMINNM">VMINNM</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUB_i_A1_Q" iformfile="vsub_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSUB_i">VSUB (integer)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VBIT_A1_Q" iformfile="vbit.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBIT">VBIT</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a1" iformfile="vceq_r.xml" label="A1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCEQ_r">VCEQ (register)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_i_A1_Q" iformfile="vmls_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMLS_i">VMLS (integer)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMULH_A1_Q" iformfile="vqrdmulh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VQRDMULH">VQRDMULH</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA256SU1_A1" arch_version="FEAT_SHA256" iformfile="sha256su1.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA256SU1">SHA256SU1</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMLAH_A1_Q" arch_version="FEAT_RDM" iformfile="vqrdmlah.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQRDMLAH">VQRDMLAH</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VBIF_A1_Q" iformfile="vbif.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBIF">VBIF</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMLSH_A1_Q" arch_version="FEAT_RDM" iformfile="vqrdmlsh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQRDMLSH">VQRDMLSH</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_124_simd3reg_same" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="a_simd_mulreg">Advanced SIMD two registers, or three registers of different lengths</funcgroupheader>
|
|
<iclass_sect id="simd2reg_dup" title="Advanced SIMD duplicate (scalar)">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="9" width="3" name="opc" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd2reg_dup" cols="3">
|
|
<col colno="1" printwidth="15*" />
|
|
<col colno="2" printwidth="18*" />
|
|
<col colno="3" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VDUP_s_A1_Q" iformfile="vdup_s.xml" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td class="iformname" iformid="VDUP_s">VDUP (scalar)</td>
|
|
<td class="enctags">A1, </td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_13_simd2reg_dup" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">001</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_14_simd2reg_dup" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">01x</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_simd2reg_dup" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="3" class="bitfield">1xx</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd3reg_tbl" title="Advanced SIMD table permute">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="2" name="len" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd3reg_tbl" cols="2">
|
|
<col colno="1" printwidth="18*" />
|
|
<col colno="2" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VTBX_A1" iformfile="vtbl.xml" first="t" last="t">
|
|
<td class="iformname" iformid="VTBL">VTBL, VTBX</td>
|
|
<td class="enctags">A1, VTBX</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd3reg_diff" title="Advanced SIMD three registers of different lengths">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="size" usename="1" settings="2" constraint="!= 11">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="opc" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="simd3reg_diff" cols="4">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="32*" />
|
|
<col colno="4" printwidth="10*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VADDL_A1" iformfile="vaddl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td class="iformname" iformid="VADDL">VADDL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADDW_A1" iformfile="vaddw.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td class="iformname" iformid="VADDW">VADDW</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUBL_A1" iformfile="vsubl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td class="iformname" iformid="VSUBL">VSUBL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VADDHN_A1" iformfile="vaddhn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td class="iformname" iformid="VADDHN">VADDHN</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUBW_A1" iformfile="vsubw.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td class="iformname" iformid="VSUBW">VSUBW</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSUBHN_A1" iformfile="vsubhn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td class="iformname" iformid="VSUBHN">VSUBHN</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMLAL_A1" iformfile="vqdmlal.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td class="iformname" iformid="VQDMLAL">VQDMLAL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABAL_A1" iformfile="vabal.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td class="iformname" iformid="VABAL">VABAL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMLSL_A1" iformfile="vqdmlsl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td class="iformname" iformid="VQDMLSL">VQDMLSL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMULL_A1" iformfile="vqdmull.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VQDMULL">VQDMULL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABDL_i_A1" iformfile="vabdl_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td class="iformname" iformid="VABDL_i">VABDL (integer)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLAL_i_A1" iformfile="vmlal_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td class="iformname" iformid="VMLAL_i">VMLAL (integer)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLSL_i_A1" iformfile="vmlsl_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td class="iformname" iformid="VMLSL_i">VMLSL (integer)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRADDHN_A1" iformfile="vraddhn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td class="iformname" iformid="VRADDHN">VRADDHN</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSUBHN_A1" iformfile="vrsubhn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td class="iformname" iformid="VRSUBHN">VRSUBHN</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMULL_i_A1" iformfile="vmull_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">11x0</td>
|
|
<td class="iformname" iformid="VMULL_i">VMULL (integer and polynomial)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_23_simd3reg_diff" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_26_simd3reg_diff" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_29_simd3reg_diff" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_30_simd3reg_diff" undef="1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd2reg_scalar" title="Advanced SIMD two registers and a scalar">
|
|
<regdiagram form="32" psname="" tworows="1">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" name="size" usename="1" settings="2" constraint="!= 11">
|
|
<c colspan="2">!= 11</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="opc" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
<decode_constraint name="size" op="!=" val="11" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="simd2reg_scalar" cols="4">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="19*" />
|
|
<col colno="4" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">Q</th>
|
|
<th class="bitfields">opc</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VMLA_s_A1_Q" iformfile="vmla_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td class="iformname" iformid="VMLA_s">VMLA (by scalar)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMLAL_A2" iformfile="vqdmlal.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td class="iformname" iformid="VQDMLAL">VQDMLAL</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLAL_s_A1" iformfile="vmlal_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td class="iformname" iformid="VMLAL_s">VMLAL (by scalar)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMLSL_A2" iformfile="vqdmlsl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td class="iformname" iformid="VQDMLSL">VQDMLSL</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLS_s_A1_Q" iformfile="vmls_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td class="iformname" iformid="VMLS_s">VMLS (by scalar)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMULL_A2" iformfile="vqdmull.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td class="iformname" iformid="VQDMULL">VQDMULL</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMLSL_s_A1" iformfile="vmlsl_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td class="iformname" iformid="VMLSL_s">VMLSL (by scalar)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMUL_s_A1_Q" iformfile="vmul_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">100x</td>
|
|
<td class="iformname" iformid="VMUL_s">VMUL (by scalar)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_15_simd2reg_scalar" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMULL_s_A1" iformfile="vmull_s.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td class="iformname" iformid="VMULL_s">VMULL (by scalar)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_20_simd2reg_scalar" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQDMULH_A2_Q" iformfile="vqdmulh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td class="iformname" iformid="VQDMULH">VQDMULH</td>
|
|
<td class="enctags">A2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMULH_A2_Q" iformfile="vqrdmulh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td class="iformname" iformid="VQRDMULH">VQRDMULH</td>
|
|
<td class="enctags">A2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_25_simd2reg_scalar" undef="1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMLAH_A2_Q" arch_version="FEAT_RDM" iformfile="vqrdmlah.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td class="iformname" iformid="VQRDMLAH">VQRDMLAH</td>
|
|
<td class="enctags">A2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRDMLSH_A2_Q" arch_version="FEAT_RDM" iformfile="vqrdmlsh.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td class="iformname" iformid="VQRDMLSH">VQRDMLSH</td>
|
|
<td class="enctags">A2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd2reg_misc" title="Advanced SIMD two registers misc">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="2" name="size" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="17" width="2" name="opc1" usename="1">
|
|
<c colspan="2"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="10" width="4" name="opc2" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd2reg_misc" cols="6">
|
|
<col colno="1" printwidth="6*" />
|
|
<col colno="2" printwidth="6*" />
|
|
<col colno="3" printwidth="6*" />
|
|
<col colno="4" printwidth="3*" />
|
|
<col colno="5" printwidth="67*" />
|
|
<col colno="6" printwidth="40*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="4">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">size</th>
|
|
<th class="bitfields">opc1</th>
|
|
<th class="bitfields">opc2</th>
|
|
<th class="bitfields">Q</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VREV64_A1_Q" iformfile="vrev64.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VREV64">VREV64</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VREV32_A1_Q" iformfile="vrev32.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VREV32">VREV32</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VREV16_A1_Q" iformfile="vrev16.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VREV16">VREV16</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_17_simd2reg_misc" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPADDL_A1_Q" iformfile="vpaddl.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VPADDL">VPADDL</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="AESE_A1" arch_version="FEAT_AES" iformfile="aese.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="AESE">AESE</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="AESD_A1" arch_version="FEAT_AES" iformfile="aesd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="AESD">AESD</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="AESMC_A1" arch_version="FEAT_AES" iformfile="aesmc.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="AESMC">AESMC</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="AESIMC_A1" arch_version="FEAT_AES" iformfile="aesimc.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="AESIMC">AESIMC</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCLS_A1_Q" iformfile="vcls.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCLS">VCLS</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSWP_A1_Q" iformfile="vswp.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSWP">VSWP</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCLZ_A1_Q" iformfile="vclz.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCLZ">VCLZ</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCNT_A1_Q" iformfile="vcnt.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCNT">VCNT</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMVN_r_A1_Q" iformfile="vmvn_r.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VMVN_r">VMVN (register)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_76_simd2reg_misc" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VPADAL_A1_Q" iformfile="vpadal.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">110x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VPADAL">VPADAL</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQABS_A1_Q" iformfile="vqabs.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VQABS">VQABS</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQNEG_A1_Q" iformfile="vqneg.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">00</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VQNEG">VQNEG</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCGT_i_A1_Q" iformfile="vcgt_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCGT_i">VCGT (immediate #0)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCGE_i_A1_Q" iformfile="vcge_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCGE_i">VCGE (immediate #0)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCEQ_i_A1_Q" iformfile="vceq_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCEQ_i">VCEQ (immediate #0)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCLE_i_A1_Q" iformfile="vcle_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCLE_i">VCLE (immediate #0)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCLT_i_A1_Q" iformfile="vclt_i.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCLT_i">VCLT (immediate #0)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VABS_A1_Q" iformfile="vabs.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VABS">VABS</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VNEG_A1_Q" iformfile="vneg.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">x111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VNEG">VNEG</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1H_A1" arch_version="FEAT_SHA1" iformfile="sha1h.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SHA1H">SHA1H</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_bfs_A1" arch_version="FEAT_AA32BF16" iformfile="vcvt_bfs.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">01</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VCVT_bfs">VCVT (from single-precision to BFloat16, Advanced SIMD)</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VTRN_A1_Q" iformfile="vtrn.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VTRN">VTRN</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VUZP_A1_Q" iformfile="vuzp.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VUZP">VUZP</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VZIP_A1_Q" iformfile="vzip.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VZIP">VZIP</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOVN_A1" iformfile="vmovn.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOVN">VMOVN</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQMOVUN_A1" iformfile="vqmovn.xml" label="VQMOVUN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQMOVN">VQMOVN, VQMOVUN</td>
|
|
<td class="enctags">A1, Unsigned result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQMOVN_A1" iformfile="vqmovn.xml" label="VQMOVN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VQMOVN">VQMOVN, VQMOVUN</td>
|
|
<td class="enctags">A1, Signed result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSHLL_A2" iformfile="vshll.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSHLL">VSHLL</td>
|
|
<td class="enctags">A2</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA1SU1_A1" arch_version="FEAT_SHA1" iformfile="sha1su1.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="SHA1SU1">SHA1SU1</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="SHA256SU0_A1" arch_version="FEAT_SHA256" iformfile="sha256su0.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="SHA256SU0">SHA256SU0</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTN_asimd_A1_Q" iformfile="vrintn_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTN_asimd">VRINTN (Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTX_asimd_A1_Q" iformfile="vrintx_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTX_asimd">VRINTX (Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTA_asimd_A1_Q" iformfile="vrinta_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTA_asimd">VRINTA (Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTZ_asimd_A1_Q" iformfile="vrintz_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTZ_asimd">VRINTZ (Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_78_simd2reg_misc" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_hs_A1" iformfile="vcvt_hs.xml" label="single-precision to half-precision" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVT_hs">VCVT (between half-precision and single-precision, Advanced SIMD)</td>
|
|
<td class="enctags">A1, Single-precision to half-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTM_asimd_A1_Q" iformfile="vrintm_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTM_asimd">VRINTM (Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_sh_A1" iformfile="vcvt_hs.xml" label="half-precision to single-precision" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VCVT_hs">VCVT (between half-precision and single-precision, Advanced SIMD)</td>
|
|
<td class="enctags">A1, Half-precision to single-precision</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_83_simd2reg_misc" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRINTP_asimd_A1_Q" iformfile="vrintp_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRINTP_asimd">VRINTP (Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTA_asimd_A1_Q" iformfile="vcvta_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">000x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTA_asimd">VCVTA (Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTN_asimd_A1_Q" iformfile="vcvtn_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">001x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTN_asimd">VCVTN (Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTP_asimd_A1_Q" iformfile="vcvtp_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">010x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTP_asimd">VCVTP (Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVTM_asimd_A1_Q" iformfile="vcvtm_asimd.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">011x</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVTM_asimd">VCVTM (Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRECPE_A1_Q" iformfile="vrecpe.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">10x0</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRECPE">VRECPE</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSQRTE_A1_Q" iformfile="vrsqrte.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">10x1</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRSQRTE">VRSQRTE</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_79_simd2reg_misc" undef="1" oneofthismnem="5" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="2" class="bitfield">10</td>
|
|
<td bitwidth="4" class="bitfield">1100</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_is_A1_Q" iformfile="vcvt_is.xml" first="t" last="t">
|
|
<td bitwidth="2" class="bitfield"></td>
|
|
<td bitwidth="2" class="bitfield">11</td>
|
|
<td bitwidth="4" class="bitfield">11xx</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_is">VCVT (between floating-point and integer, Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd3reg_ext" title="Advanced SIMD vector extract">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="9" settings="9">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="2" settings="2">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="19" width="4" name="Vn" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" name="N" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd3reg_ext" cols="2">
|
|
<col colno="1" printwidth="22*" />
|
|
<col colno="2" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th rowspan="1" class="iformname">Instruction page</th>
|
|
<th rowspan="1" class="enctags">Encoding</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VEXT_A1_Q" iformfile="vext.xml" first="t" last="t">
|
|
<td class="iformname" iformid="VEXT">VEXT (byte elements)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<funcgroupheader id="a_simd_12reg">Advanced SIMD shifts and immediate generation</funcgroupheader>
|
|
<iclass_sect id="simd1reg_imm" title="Advanced SIMD one register and modified immediate">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" name="i" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="3" settings="3">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="18" width="3" name="imm3" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="cmode" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="op" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="imm4" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<instructiontable iclass="simd1reg_imm" cols="4">
|
|
<col colno="1" printwidth="7*" />
|
|
<col colno="2" printwidth="4*" />
|
|
<col colno="3" printwidth="18*" />
|
|
<col colno="4" printwidth="25*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="2">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">cmode</th>
|
|
<th class="bitfields">op</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encoding="a1" iformfile="vmov_i.xml" label="A1" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0xx0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a1" iformfile="vmvn_i.xml" label="A1" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0xx0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMVN_i">VMVN (immediate)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a1" iformfile="vorr_i.xml" label="A1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0xx1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VORR_i">VORR (immediate)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a1" iformfile="vbic_i.xml" label="A1" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">0xx1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBIC_i">VBIC (immediate)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a3" iformfile="vmov_i.xml" label="A3" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10x0</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">A3, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a2" iformfile="vmvn_i.xml" label="A2" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10x0</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMVN_i">VMVN (immediate)</td>
|
|
<td class="enctags">A2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a2" iformfile="vorr_i.xml" label="A2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10x1</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VORR_i">VORR (immediate)</td>
|
|
<td class="enctags">A2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a2" iformfile="vbic_i.xml" label="A2" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">10x1</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VBIC_i">VBIC (immediate)</td>
|
|
<td class="enctags">A2, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a4" iformfile="vmov_i.xml" label="A4" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">11xx</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">A4, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a3" iformfile="vmvn_i.xml" label="A3" oneofthismnem="3" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">110x</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMVN_i">VMVN (immediate)</td>
|
|
<td class="enctags">A3, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encoding="a5" iformfile="vmov_i.xml" label="A5" oneofthismnem="4" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1110</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VMOV_i">VMOV (immediate)</td>
|
|
<td class="enctags">A5, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="UNALLOCATED_33_simd1reg_imm" undef="1" first="t" last="t">
|
|
<td bitwidth="4" class="bitfield">1111</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname">UNALLOCATED</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<iclass_sect id="simd2reg_shift" title="Advanced SIMD two registers and shift amount">
|
|
<regdiagram form="32" psname="">
|
|
<box hibit="31" width="7" settings="7">
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="24" name="U" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="23" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="D" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" width="3" name="imm3H" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="18" width="3" name="imm3L" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="15" width="4" name="Vd" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="11" width="4" name="opc" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
<box hibit="7" name="L" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="6" name="Q" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="5" name="M" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="4" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" width="4" name="Vm" usename="1">
|
|
<c colspan="4"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<decode_constraints>
|
|
<decode_constraint name="imm3H:imm3L:Vd:opc:L" op="!=" val="000xxxxxxxxxxx0" />
|
|
</decode_constraints>
|
|
<instructiontable iclass="simd2reg_shift" cols="7">
|
|
<col colno="1" printwidth="3*" />
|
|
<col colno="2" printwidth="9*" />
|
|
<col colno="3" printwidth="7*" />
|
|
<col colno="4" printwidth="6*" />
|
|
<col colno="5" printwidth="3*" />
|
|
<col colno="6" printwidth="62*" />
|
|
<col colno="7" printwidth="42*" />
|
|
<thead class="instructiontable">
|
|
<tr id="heading1">
|
|
<th colno="1" class="bitfields-heading" colspan="5">Decode fields</th>
|
|
<th rowspan="2" class="iformname">Instruction page</th>
|
|
<th rowspan="2" class="enctags">Encoding</th>
|
|
</tr>
|
|
<tr id="heading2">
|
|
<th class="bitfields">U</th>
|
|
<th class="bitfields">imm3H:L</th>
|
|
<th class="bitfields">imm3L</th>
|
|
<th class="bitfields">opc</th>
|
|
<th class="bitfields">Q</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr class="instructiontable" encname="VSHR_A1_Q" iformfile="vshr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0000</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSHR">VSHR</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSRA_A1_Q" iformfile="vsra.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0001</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSRA">VSRA</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VMOVL_A1" iformfile="vmovl.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield">000</td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VMOVL">VMOVL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSHR_A1_Q" iformfile="vrshr.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0010</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRSHR">VRSHR</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSRA_A1_D" iformfile="vrsra.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0011</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VRSRA">VRSRA</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSHL_i_A1_Q" iformfile="vqshl_i.xml" label="VQSHL" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0111</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VQSHL_i">VQSHL, VQSHLU (immediate)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector, signed result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSHRN_A1" iformfile="vqshrn.xml" label="VQSHRN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VQSHRN">VQSHRN, VQSHRUN</td>
|
|
<td class="enctags">A1, Signed result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRSHRN_A1" iformfile="vqrshrn.xml" label="VQRSHRN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1001</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQRSHRN">VQRSHRN, VQRSHRUN</td>
|
|
<td class="enctags">A1, Signed result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSHLL_A1" iformfile="vshll.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1010</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSHLL">VSHLL</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VCVT_xs_A1_Q" iformfile="vcvt_xs.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">11xx</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VCVT_xs">VCVT (between floating-point and fixed-point, Advanced SIMD)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSHL_i_A1_Q" iformfile="vshl_i.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSHL_i">VSHL (immediate)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSHRN_A1" iformfile="vshrn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VSHRN">VSHRN</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VRSHRN_A1" iformfile="vrshrn.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VRSHRN">VRSHRN</td>
|
|
<td class="enctags">A1</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSRI_A1_Q" iformfile="vsri.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0100</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSRI">VSRI</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VSLI_A1_Q" iformfile="vsli.xml" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0101</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VSLI">VSLI</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSHLU_i_A1_Q" iformfile="vqshl_i.xml" label="VQSHLU" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">0110</td>
|
|
<td bitwidth="1" class="bitfield"></td>
|
|
<td class="iformname" iformid="VQSHL_i">VQSHL, VQSHLU (immediate)</td>
|
|
<td class="enctags">A1, 128-bit SIMD vector, unsigned result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQSHRUN_A1" iformfile="vqshrn.xml" label="VQSHRUN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">0</td>
|
|
<td class="iformname" iformid="VQSHRN">VQSHRN, VQSHRUN</td>
|
|
<td class="enctags">A1, Unsigned result</td>
|
|
</tr>
|
|
<tr class="instructiontable" encname="VQRSHRUN_A1" iformfile="vqrshrn.xml" label="VQRSHRUN" oneofthismnem="2" first="t" last="t">
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td bitwidth="15" class="bitfield">!= 0000</td>
|
|
<td bitwidth="3" class="bitfield"></td>
|
|
<td bitwidth="4" class="bitfield">1000</td>
|
|
<td bitwidth="1" class="bitfield">1</td>
|
|
<td class="iformname" iformid="VQRSHRN">VQRSHRN, VQRSHRUN</td>
|
|
<td class="enctags">A1, Unsigned result</td>
|
|
</tr>
|
|
</tbody>
|
|
</instructiontable>
|
|
</iclass_sect>
|
|
<mappings>
|
|
<mapping from="fpdp" to_isa="T32" to="fpdp" />
|
|
<mapping from="ldv_ssall" to_isa="T32" to="asimldall" />
|
|
<mapping from="simd3reg_sameext" to_isa="T32" to="simd_3sameext" />
|
|
<mapping from="simd2reg_dup" to_isa="T32" to="simd_dup_sc" />
|
|
<mapping from="fpminmaxnm" to_isa="T32" to="fp_minmax" />
|
|
<mapping from="simd3reg_diff" to_isa="T32" to="simd_3diff" />
|
|
<mapping from="sysreg_mov32" to_isa="T32" to="sysreg_mov32" />
|
|
<mapping from="simd3reg_tbl" to_isa="T32" to="simd_tbl" />
|
|
<mapping from="fpdp2reg" to_isa="T32" to="fp_2r" />
|
|
<mapping from="simd3reg_same" to_isa="T32" to="simd_3same" />
|
|
<mapping from="movsimdgp" to_isa="T32" to="simd_dup_el" />
|
|
<mapping from="fpdp3reg" to_isa="T32" to="fp_3r" />
|
|
<mapping from="sysldst_mov64" to_isa="T32" to="sysldst_mov64" />
|
|
<mapping from="fpsimd_mov32" to_isa="T32" to="fpsimd_mov32" />
|
|
<mapping from="simd2reg_misc" to_isa="T32" to="simd_2r_misc" />
|
|
<mapping from="movfpsr" to_isa="T32" to="fp_msr" />
|
|
<mapping from="ldstsimdfp" to_isa="T32" to="simdfp_ldst" />
|
|
<mapping from="fpcsel" to_isa="T32" to="fp_csel" />
|
|
<mapping from="movsimdfpgp64" to_isa="T32" to="simdfp_mov64" />
|
|
<mapping from="fpcvtrnd" to_isa="T32" to="fp_toint" />
|
|
<mapping from="advsimddp" to_isa="T32" to="simddp" />
|
|
<mapping from="simd2reg_shift" to_isa="T32" to="simd_2r_shift" />
|
|
<mapping from="movfpgp32" to_isa="T32" to="fp_mov32" />
|
|
<mapping from="simd2reg_scalarext" to_isa="T32" to="simd_2r_scext" />
|
|
<mapping from="ldstv_ms" to_isa="T32" to="asimldstms" />
|
|
<mapping from="simd1reg_imm" to_isa="T32" to="simd_1r_imm" />
|
|
<mapping from="simdldst_mov64" to_isa="T32" to="simdldst_mov64" />
|
|
<mapping from="advsimdls" to_isa="T32" to="vldst" />
|
|
<mapping from="fpimm" to_isa="T32" to="fp_movi" />
|
|
<mapping from="simd3reg_ext" to_isa="T32" to="simd_ext" />
|
|
<mapping from="ldstv_ssone" to_isa="T32" to="asimldstss" />
|
|
<mapping from="simd2reg_scalar" to_isa="T32" to="simd_2r_sc" />
|
|
</mappings>
|
|
</encodingindex>
|