AES single round decryption. AES single round encryption. AES inverse mix columns. AES mix columns. FLDM*X. FSTMX. SHA1 hash update (choose). SHA1 fixed rotate. SHA1 hash update (majority). SHA1 hash update (parity). SHA1 schedule update 0. SHA1 schedule update 1. SHA256 hash update part 1. SHA256 hash update part 2. SHA256 schedule update 0. SHA256 schedule update 1. Vector Absolute Difference and Accumulate. Vector Absolute Difference and Accumulate Long. Vector Absolute Difference (floating-point). Vector Absolute Difference (integer). Vector Absolute Difference Long (integer). Vector Absolute. Vector Absolute Compare Greater Than or Equal. Vector Absolute Compare Greater Than. Vector Absolute Compare Less Than or Equal: an alias of VACGE. Vector Absolute Compare Less Than: an alias of VACGT. Vector Add (floating-point). Vector Add (integer). Vector Add and Narrow, returning High Half. Vector Add Long. Vector Add Wide. Vector Bitwise AND (immediate): an alias of VBIC (immediate). Vector Bitwise AND (register). Vector Bitwise Bit Clear (immediate). Vector Bitwise Bit Clear (register). Vector Bitwise Insert if False. Vector Bitwise Insert if True. Vector Bitwise Select. Vector Complex Add. Vector Compare Equal to Zero. Vector Compare Equal. Vector Compare Greater Than or Equal to Zero. Vector Compare Greater Than or Equal. Vector Compare Greater Than Zero. Vector Compare Greater Than. Vector Compare Less Than or Equal to Zero. Vector Compare Less Than or Equal: an alias of VCGE (register). Vector Count Leading Sign Bits. Vector Compare Less Than Zero. Vector Compare Less Than: an alias of VCGT (register). Vector Count Leading Zeros. Vector Complex Multiply Accumulate. Vector Complex Multiply Accumulate (by element). Vector Compare. Vector Compare, raising Invalid Operation on NaN. Vector Count Set Bits. Convert between double-precision and single-precision. Vector Convert between floating-point and fixed-point. Convert between floating-point and fixed-point. Vector Convert between floating-point and integer. Vector Convert between half-precision and single-precision. Convert floating-point to integer with Round towards Zero. Vector Convert from single-precision to BFloat16. Convert integer to floating-point. Vector Convert floating-point to integer with Round to Nearest with Ties to Away. Convert floating-point to integer with Round to Nearest with Ties to Away. Convert to or from a half-precision value in the bottom half of a single-precision register. Converts from a single-precision value to a BFloat16 value in the bottom half of a single-precision register. Vector Convert floating-point to integer with Round towards -Infinity. Convert floating-point to integer with Round towards -Infinity. Vector Convert floating-point to integer with Round to Nearest. Convert floating-point to integer with Round to Nearest. Vector Convert floating-point to integer with Round towards +Infinity. Convert floating-point to integer with Round towards +Infinity. Convert floating-point to integer. Convert to or from a half-precision value in the top half of a single-precision register. Converts from a single-precision value to a BFloat16 value in the top half of a single-precision register.. Divide. BFloat16 floating-point indexed dot product (vector, by element). BFloat16 floating-point (BF16) dot product (vector). Duplicate general-purpose register to vector. Duplicate vector element to vector. Vector Bitwise Exclusive-OR. Vector Extract. Vector Extract: an alias of VEXT (byte elements). Vector Fused Multiply Accumulate. BFloat16 floating-point widening multiply-add long (by scalar). BFloat16 floating-point widening multiply-add long (vector). Vector Floating-point Multiply-Add Long to accumulator (by scalar). Vector Floating-point Multiply-Add Long to accumulator (vector). Vector Fused Multiply Subtract. Vector Floating-point Multiply-Subtract Long from accumulator (by scalar). Vector Floating-point Multiply-Subtract Long from accumulator (vector). Vector Fused Negate Multiply Accumulate. Vector Fused Negate Multiply Subtract. Vector Halving Add. Vector Halving Subtract. Vector move Insertion. Javascript Convert to signed fixed-point, rounding toward Zero. Load multiple single 1-element structures to one, two, three, or four registers. Load single 1-element structure and replicate to all lanes of one register. Load single 1-element structure to one lane of one register. Load multiple 2-element structures to two or four registers. Load single 2-element structure and replicate to all lanes of two registers. Load single 2-element structure to one lane of two registers. Load multiple 3-element structures to three registers. Load single 3-element structure and replicate to all lanes of three registers. Load single 3-element structure to one lane of three registers. Load multiple 4-element structures to four registers. Load single 4-element structure and replicate to all lanes of four registers. Load single 4-element structure to one lane of four registers. Load Multiple SIMD&FP registers. Load SIMD&FP register (immediate). Load SIMD&FP register (literal). Vector Maximum (floating-point). Vector Maximum (integer). Floating-point Maximum Number. Vector Minimum (floating-point). Vector Minimum (integer). Floating-point Minimum Number. Vector Multiply Accumulate (by scalar). Vector Multiply Accumulate (floating-point). Vector Multiply Accumulate (integer). Vector Multiply Accumulate Long (by scalar). Vector Multiply Accumulate Long (integer). Vector Multiply Subtract (by scalar). Vector Multiply Subtract (floating-point). Vector Multiply Subtract (integer). Vector Multiply Subtract Long (by scalar). Vector Multiply Subtract Long (integer). BFloat16 floating-point matrix multiply-accumulate. Copy 16 bits of a general-purpose register to or from a 32-bit SIMD&FP register. Copy a general-purpose register to or from a 32-bit SIMD&FP register. Copy two general-purpose registers to or from a SIMD&FP register. Copy two general-purpose registers to a pair of 32-bit SIMD&FP registers. Copy a general-purpose register to a vector element. Copy immediate value to a SIMD&FP register. Copy between FP registers. Copy between SIMD registers: an alias of VORR (register). Copy a vector element to a general-purpose register with sign or zero extension. Vector Move Long. Vector Move and Narrow. Vector Move extraction. Move SIMD&FP Special register to general-purpose register. Move general-purpose register to SIMD&FP Special register. Vector Multiply (by scalar). Vector Multiply (floating-point). Vector Multiply (integer and polynomial). Vector Multiply Long (by scalar). Vector Multiply Long (integer and polynomial). Vector Bitwise NOT (immediate). Vector Bitwise NOT (register). Vector Negate. Vector Negate Multiply Accumulate. Vector Negate Multiply Subtract. Vector Negate Multiply. Vector Bitwise OR NOT (immediate): an alias of VORR (immediate). Vector bitwise OR NOT (register). Vector Bitwise OR (immediate). Vector bitwise OR (register). Vector Pairwise Add and Accumulate Long. Vector Pairwise Add (floating-point). Vector Pairwise Add (integer). Vector Pairwise Add Long. Vector Pairwise Maximum (floating-point). Vector Pairwise Maximum (integer). Vector Pairwise Minimum (floating-point). Vector Pairwise Minimum (integer). Pop SIMD&FP registers from stack: an alias of VLDM, VLDMDB, VLDMIA. Push SIMD&FP registers to stack: an alias of VSTM, VSTMDB, VSTMIA. Vector Saturating Absolute. Vector Saturating Add. Vector Saturating Doubling Multiply Accumulate Long. Vector Saturating Doubling Multiply Subtract Long. Vector Saturating Doubling Multiply Returning High Half. Vector Saturating Doubling Multiply Long. Vector Saturating Move and Narrow. Vector Saturating Negate. Vector Saturating Rounding Doubling Multiply Accumulate Returning High Half. Vector Saturating Rounding Doubling Multiply Subtract Returning High Half. Vector Saturating Rounding Doubling Multiply Returning High Half. Vector Saturating Rounding Shift Left. Vector Saturating Rounding Shift Right, Narrow: an alias of VQMOVN, VQMOVUN. Vector Saturating Rounding Shift Right, Narrow. Vector Saturating Rounding Shift Right, Narrow: an alias of VQMOVN, VQMOVUN. Vector Saturating Shift Left (register). Vector Saturating Shift Left (immediate). Vector Saturating Shift Right, Narrow: an alias of VQMOVN, VQMOVUN. Vector Saturating Shift Right, Narrow. Vector Saturating Shift Right, Narrow: an alias of VQMOVN, VQMOVUN. Vector Saturating Subtract. Vector Rounding Add and Narrow, returning High Half. Vector Reciprocal Estimate. Vector Reciprocal Step. Vector Reverse in halfwords. Vector Reverse in words. Vector Reverse in doublewords. Vector Rounding Halving Add. Vector Round floating-point to integer towards Nearest with Ties to Away. Round floating-point to integer to Nearest with Ties to Away. Vector Round floating-point to integer towards -Infinity. Round floating-point to integer towards -Infinity. Vector Round floating-point to integer to Nearest. Round floating-point to integer to Nearest. Vector Round floating-point to integer towards +Infinity. Round floating-point to integer towards +Infinity. Round floating-point to integer. Vector round floating-point to integer inexact. Round floating-point to integer inexact. Vector round floating-point to integer towards Zero. Round floating-point to integer towards Zero. Vector Rounding Shift Left. Vector Rounding Shift Right. Vector Rounding Shift Right: an alias of VORR (register). Vector Rounding Shift Right and Narrow. Vector Rounding Shift Right and Narrow: an alias of VMOVN. Vector Reciprocal Square Root Estimate. Vector Reciprocal Square Root Step. Vector Rounding Shift Right and Accumulate. Vector Rounding Subtract and Narrow, returning High Half. Dot Product index form with signed integers.. Dot Product vector form with signed integers.. Floating-point conditional select. Vector Shift Left (immediate). Vector Shift Left (register). Vector Shift Left Long. Vector Shift Right. Vector Shift Right: an alias of VORR (register). Vector Shift Right Narrow. Vector Shift Right Narrow: an alias of VMOVN. Vector Shift Left and Insert. Widening 8-bit signed integer matrix multiply-accumulate into 2x2 matrix. Square Root. Vector Shift Right and Accumulate. Vector Shift Right and Insert. Store multiple single elements from one, two, three, or four registers. Store single element from one lane of one register. Store multiple 2-element structures from two or four registers. Store single 2-element structure from one lane of two registers. Store multiple 3-element structures from three registers. Store single 3-element structure from one lane of three registers. Store multiple 4-element structures from four registers. Store single 4-element structure from one lane of four registers. Store multiple SIMD&FP registers. Store SIMD&FP register. Vector Subtract (floating-point). Vector Subtract (integer). Vector Subtract and Narrow, returning High Half. Vector Subtract Long. Vector Subtract Wide. Dot Product index form with signed and unsigned integers (by element). Vector Swap. Vector Table Lookup and Extension. Vector Transpose. Vector Test Bits. Dot Product index form with unsigned integers.. Dot Product vector form with unsigned integers.. Widening 8-bit unsigned integer matrix multiply-accumulate into 2x2 matrix. Dot Product index form with unsigned and signed integers (by element). Dot Product vector form with mixed-sign integers. Widening 8-bit mixed integer matrix multiply-accumulate into 2x2 matrix. Vector Unzip. Vector Unzip: an alias of VTRN. Vector Zip. Vector Zip: an alias of VTRN.