LDRB (literal)
Load Register Byte (literal)
Load Register Byte (literal) calculates an address from the PC value and an immediate offset, loads a byte from memory, zero-extends it to form a 32-bit word, and writes it to a register. For information about memory accesses see Memory accesses.
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
The alternative syntax permits the addition or subtraction of the offset and the immediate offset to be specified separately, including permitting a subtraction of 0 that cannot be specified using the normal syntax. For more information, see Use of labels in UAL instruction syntax.
If CPSR.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored.
It has encodings from the following instruction sets:
A32 (
A1
)
and
T32 (
T1
)
.
!= 1111
0
1
0
1
1
1
1
1
1
Z
N
LDRB{<c>}{<q>} <Rt>, <label>
LDRB{<c>}{<q>} <Rt>, [PC, #{+/-}<imm>]
if P == '0' && W == '1' then SEE "LDRBT";
t = UInt(Rt); imm32 = ZeroExtend(imm12, 32);
add = (U == '1'); wback = (P == '0') || (W == '1');
if t == 15 || wback then UNPREDICTABLE;
wback
The instruction treats bit[24] as the P bit, and bit[21] as the writeback (W) bit, and uses the same addressing mode as described in LDRB (immediate). The instruction uses post-indexed addressing when P == '0' and uses pre-indexed addressing otherwise. The instruction is handled as described in Using R15.
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
!= 1111
LDRB{<c>}{<q>} <Rt>, <label>
LDRB{<c>}{<q>} <Rt>, [PC, #{+/-}<imm>]
if Rt == '1111' then SEE "PLD";
t = UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == '1');
// Armv8-A removes UNPREDICTABLE for R13
<c>
See Standard assembler syntax fields.
<q>
See Standard assembler syntax fields.
<Rt>
Is the general-purpose register to be transferred, encoded in the "Rt" field.
<label>
The label of the literal data item that is to be loaded into <Rt>. The assembler calculates the required value of the offset from the Align(PC, 4) value of the instruction to this label. Permitted values of the offset are -4095 to 4095.
If the offset is zero or positive, imm32 is equal to the offset and add == TRUE, encoded as U == 1.
If the offset is negative, imm32 is equal to minus the offset and add == FALSE, encoded as U == 0.
+/-
Specifies the offset is added to or subtracted from the base register, defaulting to + if omitted and
<imm>
For encoding A1: is the 12-bit unsigned immediate byte offset, in the range 0 to 4095, defaulting to 0 if omitted, and encoded in the "imm12" field.
<imm>
For encoding T1: is a 12-bit unsigned immediate byte offset, in the range 0 to 4095, encoded in the "imm12" field.
if ConditionPassed() then
EncodingSpecificOperations();
base = Align(PC,4);
address = if add then (base + imm32) else (base - imm32);
R[t] = ZeroExtend(MemU[address,1], 32);