VMOV (register, SIMD) Copy between SIMD registers copies the contents of one SIMD register to another VORR (register) It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) . 1 1 1 1 0 0 1 0 0 1 0 0 0 0 1 1 0 VMOV{<c>}{<q>}{.<dt>} <Dd>, <Dm> VORR{<c>}{<q>}{.<dt>} <Dd>, <Dm>, <Dm> N:Vn == M:Vm 1 VMOV{<c>}{<q>}{.<dt>} <Qd>, <Qm> VORR{<c>}{<q>}{.<dt>} <Qd>, <Qm>, <Qm> N:Vn == M:Vm 1 1 1 0 1 1 1 1 0 1 0 0 0 0 1 1 0 VMOV{<c>}{<q>}{.<dt>} <Dd>, <Dm> VORR{<c>}{<q>}{.<dt>} <Dd>, <Dm>, <Dm> N:Vn == M:Vm 1 VMOV{<c>}{<q>}{.<dt>} <Qd>, <Qm> VORR{<c>}{<q>}{.<dt>} <Qd>, <Qm>, <Qm> N:Vn == M:Vm <c> For encoding A1: see Standard assembler syntax fields. This encoding must be unconditional. <c> For encoding T1: see Standard assembler syntax fields. <q> See Standard assembler syntax fields. <dt> An optional data type. <dt> must not be F64, but it is otherwise ignored. <Qd> Is the 128-bit name of the SIMD&FP destination register, encoded in the "D:Vd" field as <Qd>*2. <Qm> Is the 128-bit name of the SIMD&FP source register, encoded in the "N:Vn" and "M:Vm" field as <Qm>*2. <Dd> Is the 64-bit name of the SIMD&FP destination register, encoded in the "D:Vd" field. <Dm> Is the 64-bit name of the SIMD&FP source register, encoded in the "N:Vn" and "M:Vm" field.