diff --git a/build.rs b/build.rs
index 17a5742..4ad3e63 100644
--- a/build.rs
+++ b/build.rs
@@ -437,11 +437,11 @@ fn generate_rust(entries: &[EncEntry]) -> String {
     // One tiny `fn a32_dec_N(w: u32) -> A32Inst` per encoding.
     for (idx, e) in entries.iter().enumerate() {
         let vname = variant_name(&e.id);
-        writeln!(out, "fn a32_dec_{idx}(w: u32) -> A32Inst {{").unwrap();
+        writeln!(out, "const fn a32_dec_{idx}(w: u32) -> A32Inst {{").unwrap();
         if e.fields.is_empty() {
             writeln!(out, "    let _ = w; A32Inst::{vname}").unwrap();
         } else {
-            let extracts: Vec<String> = e.fields.iter().map(|f| gen_field_extract_w(f)).collect();
+            let extracts: Vec<String> = e.fields.iter().map(gen_field_extract_w).collect();
             writeln!(out, "    A32Inst::{vname} {{ {} }}", extracts.join(", ")).unwrap();
         }
         writeln!(out, "}}").unwrap();
diff --git a/src/arch/arm.rs b/src/arch/arm.rs
index 73572d0..a4e9d4d 100644
--- a/src/arch/arm.rs
+++ b/src/arch/arm.rs
@@ -287,9 +287,7 @@ pub enum ArmLiftError {
     UnsupportedControlFlow,
 }
 
-// ---------------------------------------------------------------------------
 // Helpers shared by Arch impl and lifter
-// ---------------------------------------------------------------------------
 
 /// Map a 4-bit register index to `ArmReg`.
 const fn reg_of(r: u8) -> ArmReg {
@@ -411,9 +409,7 @@ fn addr_reg_off(
     })
 }
 
-// ---------------------------------------------------------------------------
 // Arch impl
-// ---------------------------------------------------------------------------
 
 impl Arch for Arm {
     type Mode = ArmMode;
@@ -506,9 +502,7 @@ impl Arch for Arm {
     }
 }
 
-// ---------------------------------------------------------------------------
 // LiftArch impl
-// ---------------------------------------------------------------------------
 
 impl LiftArch for Arm {
     type LiftError = ArmLiftError;
@@ -529,10 +523,8 @@ impl LiftArch for Arm {
 
 fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftError> {
     match inst {
-        // ---- NOP ----------------------------------------------------------------
         A32Inst::NopA1 { .. } => Ok(()),
 
-        // ---- MOV immediate ------------------------------------------------------
         A32Inst::MovIA1 { cond, rd, imm12 } | A32Inst::MovsIA1 { cond, rd, imm12 } => {
             if cond_value(cx, *cond)?.is_some() {
                 return Err(ArmLiftError::UnsupportedCondition);
@@ -559,7 +551,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- MOV register -------------------------------------------------------
         A32Inst::MovRA1 {
             cond,
             rd,
@@ -582,7 +573,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- ADD register -------------------------------------------------------
         A32Inst::AddRA1 {
             cond,
             rn,
@@ -608,7 +598,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- SUB register -------------------------------------------------------
         A32Inst::SubRA1 {
             cond,
             rn,
@@ -634,7 +623,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- CMP register -------------------------------------------------------
         A32Inst::CmpRA1 {
             cond,
             rn,
@@ -656,7 +644,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- CMP immediate ------------------------------------------------------
         A32Inst::CmpIA1 { cond, rn, imm12 } => {
             if cond_value(cx, *cond)?.is_some() {
                 return Err(ArmLiftError::UnsupportedCondition);
@@ -673,7 +660,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- LDR immediate (offset / pre-index / post-index) --------------------
         A32Inst::LdrIA1Off {
             cond,
             u,
@@ -725,7 +711,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- LDR register (offset / pre-index / post-index) ---------------------
         A32Inst::LdrRA1Off {
             cond,
             u,
@@ -783,7 +768,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- STR immediate ------------------------------------------------------
         A32Inst::StrIA1Off {
             cond,
             u,
@@ -835,7 +819,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- STR register -------------------------------------------------------
         A32Inst::StrRA1Off {
             cond,
             u,
@@ -893,7 +876,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- B ------------------------------------------------------------------
         A32Inst::BA1 { cond, imm24 } => {
             let target_addr = cx
                 .pc
@@ -918,7 +900,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             }
         }
 
-        // ---- BL -----------------------------------------------------------------
         A32Inst::BlIA1 { cond, imm24 } => {
             if cond_value(cx, *cond)?.is_some() {
                 return Err(ArmLiftError::UnsupportedCondition);
@@ -932,7 +913,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- BLX register -------------------------------------------------------
         A32Inst::BlxRA1 { cond, rm } => {
             if cond_value(cx, *cond)?.is_some() {
                 return Err(ArmLiftError::UnsupportedCondition);
@@ -942,7 +922,6 @@ fn lift_inst(cx: &mut ArmLiftCtx<'_, '_>, inst: &A32Inst) -> Result<(), ArmLiftE
             Ok(())
         }
 
-        // ---- BX -----------------------------------------------------------------
         A32Inst::BxA1 { cond, rm } => {
             if cond_value(cx, *cond)?.is_some() {
                 return Err(ArmLiftError::UnsupportedCondition);