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<instructionsection id="PUSH_STR_i" title="PUSH (single register) -- AArch32" type="alias">
  <docvars>
    <docvar key="address-form" value="pre-indexed" />
    <docvar key="alias_mnemonic" value="PUSH" />
    <docvar key="instr-class" value="general" />
    <docvar key="mnemonic" value="STR" />
  </docvars>
  <heading>PUSH (single register)</heading>
  <desc>
    <brief>Push Single Register to Stack</brief>
    <longer> stores a single general-purpose register to the stack, storing to the 32-bit word below the address in SP, and updates SP to point to the start of the stored data</longer>
  </desc>
  <aliasto refiform="str_i.xml" iformid="STR_i">STR (immediate)</aliasto>
  <classes>
    <classesintro count="2">
      <txt>It has encodings from the following instruction sets:</txt>
      <txt> A32 (</txt>
      <a href="#iclass_a1">A1</a>
      <txt>)</txt>
      <txt> and </txt>
      <txt> T32 (</txt>
      <a href="#iclass_t4">T4</a>
      <txt>)</txt>
      <txt>.</txt>
    </classesintro>
    <iclass name="A1" oneof="2" id="iclass_a1" no_encodings="1" isa="A32">
      <docvars>
        <docvar key="armarmheading" value="A1" />
        <docvar key="instr-class" value="general" />
        <docvar key="isa" value="A32" />
        <docvar key="mnemonic" value="STR" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <regdiagram form="32" psname="" tworows="1">
        <box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
          <c colspan="4">!= 1111</c>
        </box>
        <box hibit="27" width="3" settings="3">
          <c>0</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="24" name="P" usename="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="23" name="U" usename="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="22" name="o2" settings="1">
          <c>0</c>
        </box>
        <box hibit="21" name="W" usename="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="20" name="o1" settings="1">
          <c>0</c>
        </box>
        <box hibit="19" width="4" name="Rn" usename="1" settings="4">
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="15" width="4" name="Rt" usename="1">
          <c colspan="4"></c>
        </box>
        <box hibit="11" width="12" name="imm12" usename="1" settings="12">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
        </box>
      </regdiagram>
      <encoding name="PUSH_STR_i_A1_pre" oneofinclass="1" oneof="2" label="Pre-indexed">
        <docvars>
          <docvar key="address-form" value="pre-indexed" />
          <docvar key="alias_mnemonic" value="PUSH" />
          <docvar key="armarmheading" value="A1" />
          <docvar key="instr-class" value="general" />
          <docvar key="isa" value="A32" />
          <docvar key="mnemonic" value="STR" />
        </docvars>
        <asmtemplate><text>PUSH</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}">&lt;c&gt;</a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}">&lt;q&gt;</a><text>}</text><text> </text><a link="sa_single_register_list" hover="General-purpose register {syntax{&lt;Rt&gt;}} to be stored surrounded by { and }">&lt;single_register_list&gt;</a></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="str_i.xml#STR_i_A1_pre">STR</a><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}">&lt;c&gt;</a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}">&lt;q&gt;</a><text>}</text><text> </text><a link="sa_rt_1" hover="General-purpose register to be transferred (field &quot;Rt&quot;)">&lt;Rt&gt;</a><text>, [SP, #-4]!</text></asmtemplate>
          <aliascond>Unconditionally</aliascond>
        </equivalent_to>
      </encoding>
    </iclass>
    <iclass name="T4" oneof="2" id="iclass_t4" no_encodings="1" isa="T32">
      <docvars>
        <docvar key="armarmheading" value="T4" />
        <docvar key="instr-class" value="general" />
        <docvar key="isa" value="T32" />
        <docvar key="mnemonic" value="STR" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <regdiagram form="16x2" psname="" tworows="1">
        <box hibit="31" width="9" settings="9">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="22" width="2" name="size" settings="2">
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="20" name="L" settings="1">
          <c>0</c>
        </box>
        <box hibit="19" width="4" name="Rn" usename="1" settings="4">
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="15" width="4" name="Rt" usename="1">
          <c colspan="4"></c>
        </box>
        <box hibit="11" settings="1">
          <c>1</c>
        </box>
        <box hibit="10" name="P" usename="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="9" name="U" usename="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="8" name="W" usename="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="7" width="8" name="imm8" usename="1" settings="8">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
        </box>
      </regdiagram>
      <encoding name="PUSH_STR_i_T4_pre" oneofinclass="1" oneof="2" label="Pre-indexed">
        <docvars>
          <docvar key="address-form" value="pre-indexed" />
          <docvar key="alias_mnemonic" value="PUSH" />
          <docvar key="armarmheading" value="T4" />
          <docvar key="instr-class" value="general" />
          <docvar key="isa" value="T32" />
          <docvar key="mnemonic" value="STR" />
        </docvars>
        <asmtemplate comment="Standard syntax"><text>PUSH</text><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}">&lt;c&gt;</a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}">&lt;q&gt;</a><text>}</text><text> </text><a link="sa_single_register_list" hover="General-purpose register {syntax{&lt;Rt&gt;}} to be stored surrounded by { and }">&lt;single_register_list&gt;</a></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="str_i.xml#STR_i_T4_pre">STR</a><text>{</text><a link="sa_c" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}">&lt;c&gt;</a><text>}</text><text>{</text><a link="sa_q" hover="See {xref{ARMARM_Babbefhf}{Standard assembler syntax fields}}">&lt;q&gt;</a><text>}</text><text> </text><a link="sa_rt" hover="General-purpose register to be transferred (field &quot;Rt&quot;)">&lt;Rt&gt;</a><text>, [SP, #-4]!</text></asmtemplate>
          <aliascond>Unconditionally</aliascond>
        </equivalent_to>
      </encoding>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="PUSH_STR_i_A1_pre, PUSH_STR_i_T4_pre" symboldefcount="1">
      <symbol link="sa_c">&lt;c&gt;</symbol>
      <account encodedin="">
        <intro>
          <para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="PUSH_STR_i_A1_pre, PUSH_STR_i_T4_pre" symboldefcount="1">
      <symbol link="sa_q">&lt;q&gt;</symbol>
      <account encodedin="">
        <intro>
          <para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="PUSH_STR_i_A1_pre, PUSH_STR_i_T4_pre" symboldefcount="1">
      <symbol link="sa_single_register_list">&lt;single_register_list&gt;</symbol>
      <account encodedin="">
        <intro>
          <para>Is the general-purpose register <syntax>&lt;Rt&gt;</syntax> to be stored surrounded by { and }.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="PUSH_STR_i_A1_pre" symboldefcount="1">
      <symbol link="sa_rt_1">&lt;Rt&gt;</symbol>
      <account encodedin="Rt">
        <docvars>
          <docvar key="armarmheading" value="A1" />
          <docvar key="isa" value="A32" />
        </docvars>
        <intro>
          <para>For encoding A1: is the general-purpose register to be transferred, encoded in the "Rt" field. The PC can be used, but this is deprecated.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="PUSH_STR_i_T4_pre" symboldefcount="2">
      <symbol link="sa_rt">&lt;Rt&gt;</symbol>
      <account encodedin="Rt">
        <docvars>
          <docvar key="armarmheading" value="T4" />
          <docvar key="isa" value="T32" />
        </docvars>
        <intro>
          <para>For encoding T4: is the general-purpose register to be transferred, encoded in the "Rt" field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
</instructionsection>
